Advanced pitch interconnects with multiple low aspect ratio segments
A semiconductor interconnect structure and formation thereof. The semiconductor interconnect structure includes a first high aspect ratio metal line. The first high aspect ratio metal line includes a first low aspect ratio line segment and a second low aspect ratio line segment.
1 . A semiconductor interconnect structure, comprising:
a first high aspect ratio metal line located within a dielectric layer, wherein the first high aspect ratio metal line includes a first low aspect ratio line segment and a second low aspect ratio line segment; and
a metal liner located between a sidewall of the first high aspect ratio metal line and the dielectric layer,
wherein a first portion of the metal liner located between a first sidewall portion of the first low aspect ratio line segment and a bottom portion of the dielectric layer is formed from a different material than a second portion of the metal liner located between a second sidewall portion of the second low aspect ratio line segment and a top portion of the dielectric layer.
2 . The semiconductor interconnect structure of claim 1 , wherein the first low aspect ratio line segment is located within the bottom portion of the dielectric layer, and the second low aspect ratio line segment is located within the top portion of the dielectric layer.
3 . The semiconductor interconnect structure of claim 1 , wherein sidewalls of the high aspect ratio metal line are substantially vertical.
4 . The semiconductor interconnect structure of claim 1 , further comprising:
a second high aspect ratio metal line located adjacent to the first high aspect ratio metal line, wherein the second high aspect ratio metal line includes a third low aspect ratio line segment and a fourth low aspect ratio line segment, and further wherein the first high aspect ratio metal line and the second high aspect ratio metal line are substantially uniform in height and width.
5 . The semiconductor interconnect structure of claim 1 , further comprising:
a second high aspect ratio metal line located adjacent to the first high aspect ratio metal line, wherein the second high aspect ratio metal line includes a third low aspect ratio line segment and a fourth low aspect ratio line segment, and further wherein a pitch between the first high aspect ratio metal line and the second high aspect ratio metal line is below 30 nanometers.
6 . The semiconductor interconnect structure of claim 1 , wherein the first high aspect ratio line segment is formed from at least one material selected from the group consisting of Ru, W, Co, Rh, Mo, and Ir.
7 . The semiconductor interconnect structure of claim 1 , wherein the first portion of the metal liner and the second portion of the metal liner are formed from at least one material selected from the group consisting of TiN, TaN, and HfN.
8 . The semiconductor interconnect structure of claim 1 , wherein the bottom portion of the dielectric layer and the top portion of the dielectric layer are formed from different materials.
9 . The semiconductor interconnect structure of claim 1 , wherein the top portion of the dielectric layer is formed from parylene, and the bottom portion of the dielectric layer is formed from a dielectric material other than parylene.