IP Library Granted Patent US 12685129
Granted Patent B2
US 12685129 · App. 18/459,845 · Granted Jul 14, 2026

Semiconductor device and method of manufacturing semiconductor device

Inventor: Sung Wook Jung (Icheon-si, KR)
Assignee: SK hynix Inc.
H10W20/42H10W20/076H10W20/082H10W20/083H10B69/00H10B80/00H10W90/792
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Quick Facts
Patent No.
US 12685129
App. No.
18/459,845
Granted
Jul 14, 2026
Kind
B2
Abstract

A semiconductor device may include a gate structure including conductive layers and insulating layers that are alternately stacked and including a stair structure for exposing at least one of the conductive layers, a contact plug that extends through the gate structure and that is electrically connected to a uppermost conductive layer that is exposed by the stair structure, and insulating spacers that are disposed between remaining conductive layers, among the conductive layers, and the contact plug. The insulating layers may each have a first thickness, and the insulating spacers may each have a second thickness smaller than the first thickness.

Claims (30)

1 . A method of manufacturing a semiconductor device, comprising:

forming a stack comprising interleaved first material layers and second material layers;

forming a stair structure that exposes at least one of the second material layers;

forming a first opening that is spaced apart from an end of a uppermost second material layer that is exposed by the stair structure and that extends into the stack;

forming an insulating spacers by oxidizing a surface of the second material layers exposed through the first opening;

forming a contact plug within the first opening;

forming a second openings by removing the second material layers,

exposing the contact plug by extending the second openings; and

forming a third material layers within the second openings.

2 . The method of claim 1 , wherein the exposing of the contact plug comprises exposing a portion of a sidewall of the contact plug by extending the second opening that is formed by removing the uppermost second material layer.

3 . The method of claim 1 , wherein exposing contact plug comprises selectively etching the first material layers exposed through the second openings.

4 . The method of claim 1 , further comprising extending the first opening after forming the insulating spacers.

5 . The method of claim 1 , further comprising:

forming a third opening that extends orthogonal to and into the stack; and

forming a channel structure within the third opening.

6 . The method of claim 5 , wherein the third opening is formed substantially simultaneously with the first opening formation.

7 . The method of claim 1 , further comprising:

forming a slit that extends into the stack; and

forming a slit structure within the slit.

8 . The method of claim 7 , wherein the second openings are formed by removing the second material layers through the slit.

9 . The method of claim 1 , wherein:

the first material layers each have a first thickness, and

the second material layers each have a second thickness less than the first thickness.

10 . The method of claim 1 , wherein:

the first material layers each have a first thickness, and

the insulating spacers each have a third thickness less than the first thickness.

11 . The method of claim 1 , wherein:

the insulating spacers each have a third thickness, and

the third material layers each have a fourth thickness greater than the third thickness.

12 . The method of claim 1 , wherein the insulating spacers protrude into the contact plug.