Semiconductor device with filling layer and method for fabricating the same

1 . A method for fabricating a semiconductor device, comprising:

providing a substrate;

forming a plurality of conductive layers on the substrate and forming a plurality of hard mask layers on the plurality of conductive layers;

forming a filling layer between the plurality of conductive layers and between the plurality of hard mask layers and forming an air gap in the filling layer; and

forming a dielectric layer on the plurality of hard mask layers and the filling layer;

wherein the filling layer comprises boron carbonitride;

wherein forming the plurality of conductive layers and forming the plurality of hard mask layers comprising:

forming a layer of conductive material on the substrate;

forming a layer of hard mask material on the layer of conductive material;

performing a first hard mask etching process to turn the layer of hard mask material into the plurality of hard mask layers on the layer of conductive material; and

performing a first etching process to turn the layer of conductive material into the plurality of conductive layers;

wherein forming the filling layer comprising:

forming a layer of filling material to cover top surfaces of the plurality of hard mask layers and partially fill a space between the plurality of conductive layers, wherein the air gap is formed in the layer of filling material; and

performing a planarization process until the top surfaces of the plurality of hard mask layers are exposed to turn the layer of filling material into the filling layer.

2 . The method for fabricating the semiconductor device of claim 1 , wherein the conductive material comprises tungsten, cobalt, zirconium, tantalum, titanium, aluminum, ruthenium, copper, metal carbides, metal nitrides, transition metal aluminides, or a combination thereof.

3 . The method for fabricating the semiconductor device of claim 2 , wherein the hard mask material comprises silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide.

4 . The method for fabricating the semiconductor device of claim 3 , wherein dielectric layer comprises silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, undoped carbonitride, or doped carbonitride.

5 . The method for fabricating the semiconductor device of claim 4 , wherein the dielectric layer comprises p-type dopants or n-types dopants.

6 . The method for fabricating the semiconductor device of claim 5 , wherein a process temperature of forming the layer of hard mask material is between about 100° C. and about 700° C.

7 . The method for fabricating the semiconductor device of claim 6 , wherein a process pressure of forming the layer of hard mask material is between 1 Torr and about 20 Torr.

8 . The method for fabricating the semiconductor device of claim 7 , wherein reactants of forming the layer of hard mask material comprise propylene, propyne, propane, butane, butylene, butadiene, acetylene, or a combination thereof.

9 . The method for fabricating the semiconductor device of claim 8 , wherein a flow rate of the reactants of forming the layer of hard mask material is between about 50 sccm and about 2000 sccm.

10 . The method for fabricating the semiconductor device of claim 9 , wherein precursors of forming the layer of filling material comprise tris(dimethylamino) borane, dimethylamine borane, trimethylamine borane, triethylamine borane, or tetrakis(dimethylamino)diborane.

11 . The method for fabricating the semiconductor device of claim 10 , wherein a process pressure of forming the layer of filling material is less than or about 10 Torr.

12 . The method for fabricating the semiconductor device of claim 11 , wherein a process temperature of forming the layer of filling material is below or about 500° C.

13 . The method for fabricating the semiconductor device of claim 12 , wherein a boron concentration of the filling layer is greater than or about 30%.

14 . A method for fabricating a semiconductor device, comprising:

providing a substrate;

forming a plurality of conductive layers on the substrate;

forming a plurality of hard mask layers on the plurality of conductive layers;

forming a layer of filling material to cover top surfaces of the plurality of hard mask layers and partially fill a space between the plurality of conductive layers;

performing a planarization process until the top surfaces of the plurality of hard mask layers are exposed to turn the layer of filling material into a filling layer and concurrently form a recess in the filling layer; and

forming a dielectric layer on the plurality of hard mask layers and the filling layer and sealing the recess to form an air gap;

wherein the filling layer comprises boron carbonitride.