IP Library Granted Patent US 12685147
Granted Patent B2
US 12685147 · App. 18/303,865 · Granted Jul 14, 2026

Active region electrically programmable fuse with gate structure as silicide block

Inventors: Thanh Hoa Phung (Singapore, SG); Myo Aung Maung (Singapore, SG); Hari Balan (Singapore, SG); Anurag Swarnkar (Singapore, SG)
Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
H10W20/493H10D84/01
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Quick Facts
Patent No.
US 12685147
App. No.
18/303,865
Granted
Jul 14, 2026
Kind
B2
Abstract

An electrically programmable fuse includes a first contact, a second contact spaced from the first contact, and a link between and electrically connecting the first contact and the second contact. The first contact, the second contact and the link include semiconductor material. A gate structure is partially over the link, leaving an uncovered link region uncovered by the gate structure. A silicide region is within the uncovered link region and provides an effective fuse link. The gate structure blocks silicide formation over an entirety of the fuse link, reducing the width of the effective fuse link, reducing the necessary programming current and the overall size of the electrically programmable fuse.

Claims (27)

1 . An electrically programmable fuse, comprising:

a first contact;

a second contact spaced from the first contact;

a link between and electrically connecting the first contact and the second contact, wherein the first contact, the second contact and the link include semiconductor material;

a gate structure partially over the link, wherein an uncovered link region is uncovered by the gate structure, wherein the gate structure includes a body including one of a polysilicon and a metal, and a spacer adjacent a sidewall of the body; and

a silicide region within the uncovered link region,

wherein the link, the first contact and the second contact define a longitudinal axis, and the silicide region has a silicide width defined perpendicular to the longitudinal axis between a first edge of the silicide region that is parallel to the longitudinal axis and a second edge of the silicide region that is parallel to the longitudinal axis, and

wherein the silicide region includes a first silicide region within a first edge surface at the first edge of the link and a second silicide region within a second edge surface at the second edge of the link, and wherein the gate structure is over a portion of the link and, in a direction of the silicide width, between the first silicide region and the second silicide region, and wherein each of the first and second silicide regions has a respective width that is a portion of the silicide width.

2 . The electrically programmable fuse of claim 1 , wherein at least one of the first contact and the second contact have a width defined perpendicular to the longitudinal axis larger than a link width defined perpendicular to the longitudinal axis between a first edge of the link and a second edge of the link.

3 . The electrically programmable fuse of claim 1 , wherein the gate structure is over a center portion of the link.

4 . The electrically programmable fuse of claim 1 , wherein the link has a link length between the first contact and the second contact and the first and second silicide regions are over an entirety of the link length.

5 . The electrically programmable fuse of claim 1 , wherein the link has a link length between the first contact and the second contact and the gate structure is over only a portion of the link length.

6 . An electrically programmable fuse, comprising:

a semiconductor fuse element including a first contact, a second contact spaced from the first contact and a link between and electrically connecting the first contact and the second contact;

a gate structure partially over the link, wherein an uncovered link region is uncovered by the gate structure, the link has a link length between the first contact and the second contact, and the gate structure is also over a portion of the link length and a portion of at least one of the first contact and the second contact, wherein the gate structure includes a body including one of a polysilicon and a metal, and a spacer adjacent a sidewall of the body; and

a silicide region within the uncovered link region.

7 . The electrically programmable fuse of claim 6 , wherein the link, the first contact and the second contact define a longitudinal axis, and the silicide region has a silicide width defined perpendicular to the longitudinal axis between a first edge of the link and a second edge of the link.

8 . The electrically programmable fuse of claim 7 , wherein the silicide region is between the first edge of the link and the second edge of the link.

9 . The electrically programmable fuse of claim 7 , wherein the silicide region is within only one of a first edge surface at the first edge of the link and a second edge surface at the second edge of the link and the gate structure is over a remaining portion of the link.

10 . The electrically programmable fuse of claim 6 , wherein the link has a link length between the first contact and the second contact and the silicide region extends an entirety of the link length.

11 . The electrically programmable fuse of claim 6 , wherein the gate structure is over an entirety of the link length.

12 . A method, comprising:

forming a semiconductor fuse element in a semiconductor layer, the semiconductor fuse element including a first contact, a second contact spaced from the first contact and a link between and electrically connecting the first contact and the second contact;

forming a gate structure partially over the link and over a portion of at least one of the first contact and the second contact, wherein an uncovered link region is uncovered by the gate structure, wherein forming the gate structure includes at least one of:

forming a polysilicon layer over the electrically programmable fuse element and patterning the polysilicon layer to expose the uncovered link region, and forming at least one metal layer over the electrically programmable fuse element and patterning the at least one metal layer to expose the uncovered link region; and

forming a silicide region within the uncovered link region.

13 . The method of claim 12 , wherein forming the gate structure includes forming a spacer adjacent a sidewall of the body.