Etching-damage-free intermetal dielectric layer with thermal dissipation feature
A semiconductor device includes a substrate, a dielectric layer disposed over the substrate, and an interconnect structure extending through the dielectric layer. The dielectric layer includes a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from about 30 atomic % to about 45 atomic %. The semiconductor device further includes a thermal dissipation feature extending through the dielectric layer and disposed to be spaced apart from the interconnect structure.
1 . A method for manufacturing a semiconductor device, comprising:
forming a lower thermal dissipation layer over a substrate;
subjecting the lower thermal dissipation layer to a plasma treatment so as to convert the lower thermal dissipation layer from a polycrystalline state to a single crystalline state;
forming a dielectric layer on the lower thermal dissipation layer using a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from 30 atomic % to 45 atomic %; and
forming an interconnect structure to extend through the dielectric layer.
2 . The method according to claim 1 , further comprising forming a thermal dissipation feature using a thermal conductive dielectric material having a thermal conductivity ranging from 1 W/mK to 2 W/mK, such that the thermal dissipation feature extends through the dielectric layer and is disposed to be spaced apart from the interconnect structure.
3 . The method according to claim 2 , wherein the lower thermal dissipation layer has a thermal conductivity ranging from 150 W/mK to 200 W/mK, and the thermal dissipation feature is in contact with the lower thermal dissipation layer.
4 . The method according to claim 3 , further comprising forming an upper thermal dissipation layer having a thermal conductivity ranging from 150 W/mK to 200 W/mK on an upper surface of the dielectric layer such that the thermal dissipation feature extends through and is in contact with the upper thermal dissipation layer.
5 . The method according to claim 4 , wherein one of the lower thermal dissipation layer and the upper thermal dissipation layer includes aluminum nitride.
6 . The method according to claim 5 , wherein the one of the lower thermal dissipation layer and the upper thermal dissipation layer is formed by chemical vapor deposition or atomic layer deposition using a first precursor containing aluminum and a second precursor containing nitrogen.
7 . The method according to claim 6 , wherein the first precursor includes trimethyl aluminum, triethyl aluminum, or a combination thereof.
8 . The method according to claim 6 , wherein the second precursor includes nitrogen gas, ammonia, or a combination thereof.
9 . The method according to claim 2 , wherein the thermal conductive dielectric material includes silicon oxide.
10 . The method according to claim 1 , wherein the dielectric layer is formed by a deposition process using a first precursor containing silicon and carbon and a second precursor containing nitrogen.
11 . The method according to claim 10 , wherein the first precursor includes methylsilane, dimethylsilane, trimethylsilane, tetramethylsilane, methyldisilane, dimethyldisilane, trimethyldisilane, tetramethyldisilane, pentamethyldisilane, hexamethyldisilane, or combinations thereof.
12 . The method according to claim 10 , wherein the second precursor includes nitrogen gas, ammonia, or a combination thereof.
13 . The method according to claim 1 , wherein the dielectric layer is formed by a deposition process using a silicon-containing precursor, a carbon-containing precursor, and a nitrogen-containing precursor.
14 . The method according to claim 13 , wherein the silicon-containing precursor includes silane, disilane, or a combination thereof.
15 . The method according to claim 13 , wherein the carbon-containing precursor includes ethylene.
16 . The method according to claim 13 , wherein the nitrogen-containing precursor includes nitrogen gas, ammonia, or a combination thereof.
17 . A method for manufacturing a semiconductor device, comprising:
sequentially forming a first etch stop layer, a dielectric layer, and a second etch stop layer over a substrate, wherein the dielectric layer is formed using a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from 30 atomic % to 45 atomic %, and wherein one of the first etch stop layer and the second stop layer has a thermal conductivity ranging from 150 W/mK to 200 W/mK;
forming a thermal dissipation feature using a thermal conductive dielectric material having a thermal conductivity ranging from 1 W/mK to 2 W/mK, such that the thermal dissipation feature extends through the second etch stop layer and the dielectric layer to terminate at the first etch stop layer; and
forming an interconnect structure to extend through the second etch stop layer and the dielectric layer to terminate at the first etch stop layer and to be spaced apart from the thermal dissipation feature,
wherein an interface formed between the thermal dissipation feature and the first etch stop layer is flush with an interface formed between the dielectric layer and the first etch stop layer.
18 . The method according to claim 17 , further comprising: subjecting the first etch stop layer to a plasma treatment so as to convert the first etch stop layer from a polycrystalline state to a single crystalline state.
19 . A method for manufacturing a semiconductor device, comprising:
sequentially forming a first etch stop layer, a dielectric layer, and a second etch stop layer over a substrate, wherein the dielectric layer is formed using a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from 30 atomic % to 45 atomic %, and wherein one of the first etch stop layer and the second stop layer has a thermal conductivity ranging from 150 W/mK to 200 W/mK;
subjecting the one of the first etch stop layer and the second stop layer to a plasma treatment so as to convert the one of the first etch stop layer and the second stop layer from a polycrystalline state to a single crystalline state;
forming a thermal dissipation feature using a thermal conductive dielectric material having a thermal conductivity ranging from 1 W/mK to 2 W/mK, such that the thermal dissipation feature extends through the second etch stop layer and the dielectric layer to terminate at the first etch stop layer′; and
forming an interconnect structure to extend through the second etch stop layer and the dielectric layer to terminate at the first etch stop layer and to be spaced apart from the thermal dissipation feature.
20 . The method according to claim 19 , wherein
the one of the first etch stop layer and the second stop layer includes aluminum nitride; and
the plasma treatment is processed using an inert gas plasma which includes helium plasma, argon plasma, or a combination thereof.