Flip chip packaged devices with thermal interposer
In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.
1 . An apparatus, comprising:
a package substrate having a die mount surface;
a semiconductor die that is flip chip mounted to the package substrate on the die mount surface;
a silicon interposer having a first surface attached to a backside surface of the semiconductor die, the silicon interposer having a second surface opposite the first surface covered with a plating layer, wherein the first surface of the silicon interposer is attached to the backside surface of the semiconductor die via a die attach material;
a mold compound covering a portion of the package substrate, a portion of the silicon interposer, and the semiconductor die, the silicon interposer having the plating layer on the second surface that is an exposed surface from the mold compound; and
a circuit board, wherein the plating layer is attached to the circuit board via a solder material, and wherein at least one sidewall of the silicon interposer is aligned with a sidewall of the semiconductor die.
2 . The apparatus of claim 1 , further comprising leads formed in the package substrate and extending from the mold compound.
3 . The apparatus of claim 2 , wherein the leads are shaped to extend alongside a portion of a package body formed by the mold compound, the leads having end portions configured for surface mounting to the circuit board.
4 . The apparatus of claim 1 , wherein the apparatus comprises a small outline transistor (SOT) package.
5 . The apparatus of claim 1 , wherein the package substrate comprises one of copper and copper alloys.
6 . The apparatus of claim 1 , wherein the package substrate comprises a metal lead frame.
7 . The apparatus of claim 6 , wherein the metal lead frame comprises one selected from copper, stainless steel, steel, alloy 42, and alloys thereof.
8 . The apparatus of claim 1 , wherein the plating layer comprises one of copper, nickel, tin, gold, silver, palladium, combinations of these, and alloys thereof.
9 . An apparatus, comprising:
a first lead and a second lead of a semiconductor package;
a semiconductor die including a first pillar bump attached to the first lead and a second pillar bump attached to the second lead;
a silicon interposer having a first surface attached to an opposite side of the semiconductor die that includes the first pillar bump and the second pillar bump, the silicon interposer having a plating layer on a second surface that is opposite the first surface, wherein the silicon interposer is attached to the semiconductor die via a die attach material;
a mold compound covering a portion of the first lead and the second lead, the silicon interposer, the semiconductor die, the first pillar bump, and the second pillar bump, wherein the plating layer on the second surface of the silicon interposer is exposed from the mold compound; and
a circuit board, wherein the plating layer is attached to the circuit board via a solder material, and wherein at least one sidewall of the silicon interposer is aligned with a sidewall of the semiconductor die.
10 . The apparatus of claim 9 , wherein the semiconductor package is a leaded package, and another portion of the first lead and the second lead extends from the mold compound.
11 . The apparatus of claim 10 , wherein the first lead and the second lead are shaped to extend alongside a portion of a package body formed by the mold compound, the first lead and the second lead having end portions configured for surface mounting to the circuit board.
12 . The apparatus of claim 9 , wherein the first pillar bump is attached to the first lead via solder and the second pillar bump is attached to the second lead via solder.
13 . The apparatus of claim 9 , wherein the semiconductor package is a small outline transistor (SOT) package.
14 . The apparatus of claim 9 , wherein the first lead and the second lead comprise one selected from copper, stainless steel, steel, alloy 42, and alloys thereof.
15 . The apparatus of claim 9 , wherein the plating layer comprises one of copper, nickel, tin, gold, silver, palladium, combinations of these, and alloys thereof.