Flip-chip ball grid array-type integrated circuit package for very high frequency operation
The invention relates to a flip-chip integrated circuit package of the ball array type, wherein: the underside of the package includes a plurality of receiving pads for signal, ground and solder balls; stacks of signal and ground vias, electrically connected to respective receiving pads, pass vertically through the package's dielectric body forming a quasi-coaxial structure. In an upper part of the package body: the signal vias are electrically connected to a lesser number of signal conductive bumps protruding from the upper surface of the package's dielectric body; and at least two ground vias are connected by means of conductive projections to respective ground conductive bumps, forming a ring around the signal conductive bumps.
1 . A flip-chip ball grid array type integrated circuit package comprising:
a dielectric body having an upper face and an underside in which:
the underside of the dielectric body comprises a plurality of receiving pads for means of connection, comprising a central signal receiving pad and peripheral ground receiving pads surrounding the central signal receiving pad;
a plurality of stacks of signal vias, electrically connected to the central signal receiving pad, and passing vertically through the dielectric body;
a plurality of stacks of ground vias, electrically connected to the peripheral ground receiving pads, passing vertically through the dielectric body and forming a ring around the plurality of stacks of signal vias; wherein, in an upper part of the dielectric body:
the plurality of stacks of signal vias are electrically connected to a lesser number of signal conducting bumps projecting from the upper face of the dielectric body; and
at least two ground vias are connected, by means of conductive projections, to respective ground conductive bumps, projecting from the upper face of the dielectric body and forming a ring around signal conducting bumps.
2 . The package according to claim 1 , wherein the dielectric body consists of a stack of dielectric layers.
3 . The package according to claim 2 , wherein:
conductive ground planes are arranged between at least some of the dielectric layers, the conductive ground planes having openings that have substantially the same diameter and are aligned in a vertical direction, perpendicular to the conductive ground planes;
the stacks of signal vias, electrically connected to the signal receiving pad, pass vertically through the dielectric layers corresponding to a central region of the openings of the ground planes;
the stacks of ground vias, electrically connected to the ground receiving pads, pass vertically through the dielectric layers outside of the openings of the ground planes; and
the ground vias connected, by means of conductive projections, to respective conductive bumps, are located on either side of the opening of the conductive ground plane.
4 . The package according to claim 3 , wherein all the ground vias are connected by means of the conductive projections, to respective ground conductive bumps located inside the opening.
5 . The package according to claim 1 , wherein the plurality of stacks of signal vias are interconnected by conductive bridges.
6 . The package according to claim 4 , wherein the plurality of stacks of signal vias are interconnected by conductive bridges.
7 . The package according to claim 6 , wherein the plurality of stacks of ground vias do not extend through a lower part of the package, an electrical connection with the ground receiving pads being provided by other stacks of ground vias, forming a ring around the plurality of stacks of signal vias having a larger diameter than the diameter of the ring formed by the stacks of ground vias.
8 . The package according to claim 1 , wherein the stacks of ground vias do not extend through a lower part of the package, an electrical connection with the ground receiving pads being provided by other stacks of ground vias, forming a ring around the plurality of stacks of signal vias having a larger diameter than the diameter of the ring formed by the plurality of stacks of ground vias.
9 . The package according to claim 8 , wherein the dielectric body is made of ceramic material.
10 . The package according to claim 8 , wherein the dielectric body is made of organic material.
11 . The package according to claim 8 , comprising one signal conducting bump.
12 . The package according to claim 3 , wherein the diameter of the openings of the ground planes, the number of stacks of signal vias, the diameter of the ring(s) of ground vias around the plurality of stacks of signal vias, the number of ground conductive bumps and the diameter of the ring that the ground conductive bumps forms around the signal conducting bump or bumps are chosen to ensure impedance continuity between the pads for solder balls and the ground conductive bumps projecting from the upper face of the dielectric body.
13 . The package according to claim 1 , wherein the dielectric body is made of organic material.
14 . The package according to claim 1 , comprising one signal conducting bump.
15 . The package according to claim 3 , wherein the diameter of the openings of the ground planes, the number of stacks of signal vias, the diameter of the ring(s) of ground vias around the plurality of stacks of signal vias, the number of ground conductive bumps and the diameter of the ring that the ground conductive bumps forms around the signal conducting bump or bumps are chosen to ensure impedance continuity between the pads for solder balls and the ground conductive bumps projecting from the upper face of the dielectric body.
16 . The package according to claim 1 , carrying a flipped semiconductor chip, electrically connected to the ground conductive bumps projecting from the upper face of the dielectric body and to the signal conductive bumps projecting from the upper face of the dielectric body.
17 . The package according to claim 15 , carrying a flipped semiconductor chip, electrically connected to the ground conductive bumps projecting from the upper face of the dielectric body.
18 . A printed circuit board comprising:
a signal conductor;
and at least one ground plane forming a transmission line for microwave signals, the printed circuit board carrying a package according to claim 1 , the central signal receiving pad of the package being connected to the signal conductor by means of a solder ball and the peripheral ground receiving pads of the package also being connected to the at least one ground plane by means of solder balls.
19 . A printed circuit board comprising:
a signal conductor;
and at least one ground plane forming a transmission line for microwave signals, the printed circuit board carrying a package according to claim 3 , the central signal receiving pad of the package being connected to the signal conductor by means of a solder ball and the peripheral ground receiving pads of the package also being connected to the ground plane(s) by means of solder balls.
20 . A printed circuit board comprising:
a signal conductor;
and at least one ground plane forming a transmission line for microwave signals, the printed circuit board carrying a package according to claim 8 , the signal receiving pad of the package being connected to the signal conductor by means of a solder ball and the ground receiving pads of the package also being connected to the at least one ground plane by means of solder balls.