IP Library Granted Patent US 12685190
Granted Patent B2
US 12685190 · App. 18/356,721 · Granted Jul 14, 2026

Semiconductor packages having a coupling member including a vertical wire and a metal portion extending around the vertical wire

Inventors: Jaemok Jung (Suwon-si, KR); Un-Byoung Kang (Suwon-si, KR); Dowan Kim (Suwon-si, KR); Sung Keun Park (Suwon-si, KR); Jongho Park (Suwon-si, KR); Ju-Il Choi (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10W70/635H10W20/087H10W20/20H10W74/016H10W74/117H10W72/932H10W74/00H10W80/732H10W90/732H10W90/734H10W90/794
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Quick Facts
Patent No.
US 12685190
App. No.
18/356,721
Granted
Jul 14, 2026
Kind
B2
Abstract

An embodiment provides a semiconductor package including: a first redistribution layer substrate; a semiconductor chip on the first redistribution layer substrate; a coupling member on the first redistribution layer substrate, wherein the coupling member is spaced apart from the semiconductor chip; an encapsulant on the first redistribution layer substrate, the semiconductor chip, and the coupling member; and a second redistribution layer substrate on the encapsulant, wherein the coupling member includes a vertical wire and a metal portion extending around the vertical wire, and wherein a first end of the coupling member is electrically connected to the first redistribution layer substrate, and a second end of the coupling member is electrically connected to the second redistribution layer substrate.

Claims (28)

1 . A semiconductor package comprising:

a first redistribution layer substrate;

a semiconductor chip on the first redistribution layer substrate;

a coupling member on the first redistribution layer substrate, wherein the coupling member is spaced apart from the semiconductor chip;

an encapsulant on the first redistribution layer substrate, the semiconductor chip, and the coupling member; and

a second redistribution layer substrate on the encapsulant,

wherein the coupling member includes a bonding wire and a metal portion extending around the bonding wire,

wherein the bonding wire includes a compressed ball and a vertical wire stretched from the compressed ball, and

wherein a first end of the coupling member is electrically connected to the first redistribution layer substrate, and a second end of the coupling member is electrically connected to the second redistribution layer substrate.

2 . The semiconductor package of claim 1 , wherein the bonding wire includes at least one of gold, silver, copper, and an alloy thereof.

3 . The semiconductor package of claim 1 , wherein the metal portion includes at least one of copper, nickel, zinc, gold, silver, platinum, palladium, chromium, titanium, and an alloy thereof.

4 . A semiconductor package comprising: a first redistribution layer substrate including a redistribution line and a redistribution via on the redistribution line;

a bonding pad on the redistribution line and the redistribution via;

a coupling member on the bonding pad;

a semiconductor chip on the first redistribution layer substrate, wherein the semiconductor chip is spaced apart from the coupling member;

a connection member that electrically connects the first redistribution layer substrate and the semiconductor chip;

an encapsulant on the bonding pad, the coupling member, the connection member, and the semiconductor chip; and

a second redistribution layer substrate on the encapsulant,

wherein the coupling member includes a bonding wire and a metal portion extending around the bonding wire,

wherein the bonding wire includes a compressed ball and a vertical wire stretched from the compressed ball, and

wherein a first end of the coupling member is electrically connected to the bonding pad, and a second end of the coupling member is electrically connected to the second redistribution layer substrate.

5 . The semiconductor package of claim 4 , wherein the bonding pad includes at least one of copper, nickel, zinc, gold, silver, platinum, palladium, chromium, titanium, and an alloy thereof.

6 . The semiconductor package of claim 4 , wherein the bonding wire covers on an upper surface and a side surface of the bonding pad.

7 . The semiconductor package of claim 4 , wherein a width of the coupling member in a direction is the same as a width of the bonding pad in the direction.

8 . The semiconductor package of claim 4 , wherein a width of the coupling member in a direction is narrower than a width of the bonding pad in the direction.

9 . The semiconductor package of claim 4 , wherein a width of the bonding pad in a direction is narrower than a width of the coupling member in the direction and wider than a width of the vertical wire in the direction.

10 . The semiconductor package of claim 4 , wherein a lowermost end of the metal portion is spaced apart from an uppermost end of the bonding pad.

11 . The semiconductor package of claim 4 , wherein a lowermost end of the metal portion is in contact with an uppermost end of the bonding pad.