Multichip IC devices in glass medium and including an interconnect bridge die
Multi-die packages including at least one glass substrate within a space between two adjacent IC dies or surrounding an interconnect bridge die. The various IC dies may be placed within recesses formed in the glass substrate. The IC die and glass substrate, along with any conductive vias extending through the glass substrate may be planarized. The bridge die may be directly bonded or soldered to the adjacent IC dies, providing fine pitch interconnect. The opposite side of the adjacent IC dies and glass substrate may be attached to a host component or may be built up with package dielectric material. Metallization features formed on the second side of the glass substrate may electrically interconnect the IC dies to package interconnect interfaces that may be further coupled to a host with solder interconnects.
1 . An integrated circuit (IC) device, comprising:
a first IC die adjacent to a second IC die;
a third IC die on a first side of the first and second IC dies, wherein the third IC die comprises metallization features interconnecting the first IC die to the second IC die, and wherein the third IC die is in direct contact with a portion of the first IC die and the second IC die;
a glass substrate adjacent to the first and second IC dies and coplanar with the first sides of the first and second IC dies, wherein the glass substrate is between a sidewall of the first IC die and a sidewall of the second IC die; and
a routing structure on a second side of the glass substrate and a second side of the first and second IC dies, the routing structure comprising second metallization features interconnecting the second sides of each of the first and second IC dies to interconnect interfaces.
2 . The IC device of claim 1 , wherein a thickness of the glass substrate is substantially equal to a thickness of at least one of the first and second IC dies.
3 . The IC device of claim 2 , wherein the glass substrate is thicker than at least one of the first and second IC dies, and a host component is coupled to the at least one of the first or second IC dies by a conductive through glass via.
4 . The IC device of claim 1 , further comprising a package dielectric material adjacent to the third IC die.
5 . The IC device of claim 4 , wherein the package dielectric is in direct contact with a portion of the glass substrate and in direct contact with a sidewall of the third IC die.
6 . The IC device of claim 1 , wherein the routing structure is in direct contact with the glass substrate.
7 . The IC device of claim 1 , wherein the metallization features comprise a first plurality of features directly bonded to metallization features of the first IC die and a second plurality of features directly bonded to metallization features of the second IC die.
8 . The IC device of claim 1 , wherein the metallization features comprise a first plurality of features interconnected by solder to metallization features of the first IC die and a second plurality of features interconnected by solder to metallization features of the second IC die.
9 . The IC device of claim 1 , wherein the glass substrate is in direct contact with a portion of the third IC die spanning a distance between adjacent edges of the first and second IC dies.
10 . An integrated circuit (IC) device, comprising:
a first IC die adjacent to a second IC die;
a third IC die on a first side of the first and second IC dies, wherein the third IC die comprises metallization features interconnecting the first IC die to the second IC die, wherein each of the first and second IC dies further comprises a device layer over a die substrate and one or more conductive vias extending through the die substrate;
a glass substrate adjacent to the first and second IC dies and coplanar with the first sides of the first and second IC dies; and
a routing structure on a second side of the glass substrate and a second side of the first and second IC dies, the routing structure comprising second metallization features interconnecting the second sides of each of the first and second IC dies to interconnect interfaces, wherein the conductive vias couple the device layer to the third IC die or to the routing structure.
11 . The IC device of claim 10 , wherein the third IC die is directly coupled to the device layer, and the routing structure is coupled to the device layer through the conductive vias.
12 . The IC device of claim 10 , wherein the routing structure is directly coupled to the device layer and the third IC die is coupled to the device layer through the conductive vias.
13 . A system comprising:
a plurality of laterally adjacent IC dies;
an interconnect bridge die on a first side of the laterally adjacent IC dies, the interconnect bridge die comprising first metallization features interconnecting the plurality of laterally adjacent IC die;
a glass substrate material between edge sidewalls of the plurality of adjacent IC dies, the glass substrate material coplanar with the first side of the laterally adjacent IC dies, wherein the glass substrate is in direct contact with a portion of the interconnect bridge die spanning a distance between adjacent edges of the IC dies; and
a routing structure on a second side of the plurality of adjacent IC dies, opposite the interconnect bridge die, the routing structure spanning a portion of the glass substrate material, and comprising second metallization features interconnecting the plurality of adjacent IC dies to interconnect features.
14 . The system of claim 13 , further comprising:
a host component interconnected to the routing structure through first-level interconnects coupled to the interconnect features.
15 . The system of claim 13 , wherein the interconnect features comprise solder.
16 . The system of claim 13 , further comprising:
a host component interconnected to the first routing structure through first-level interconnects coupled to the interconnect features; and
a power supply coupled through the host component to provide power to the plurality of adjacent IC dies.
17 . The system of claim 13 , further comprising a package dielectric material adjacent to the interconnect bridge die.
18 . The system of claim 17 , wherein the package dielectric is in direct contact with a portion of the glass substrate and in direct contact with a sidewall of the interconnect bridge die.