Semiconductor package

1 . A semiconductor package comprising:

a first substrate including silicon;

a first insulating layer in contact with the first substrate on the first substrate, the first insulating layer including silicon oxide, the first insulating layer having a first concentration of silicon;

a second insulating layer in contact with the first insulating layer on the first insulating layer, the second insulating layer including silicon oxide, the second insulating layer having a second concentration of silicon, the second concentration lower than the first concentration; and

a structure on the second insulating layer,

wherein the first concentration is a ratio of a weight of silicon in the first insulating layer to a total weight of the first insulating layer,

wherein the second concentration is a ratio of a weight of silicon in the second insulating layer to a total weight of the second insulating layer, and

wherein the first concentration is in a range from 20 wt % to 50 wt %.

2 . The semiconductor package of claim 1 , wherein a thickness of the second insulating layer is smaller than a thickness of the first insulating layer.

3 . The semiconductor package of claim 1 , wherein a thickness of the second insulating layer is in a range from 20 Å to 200 Å.

4 . The semiconductor package of claim 1 , wherein the second concentration is in a range from 5 wt % to 20 wt %.

5 . The semiconductor package of claim 1 , wherein the structure includes

a third insulating layer in contact with the second insulating layer on the second insulating layer, the third insulating layer including silicon oxide, the third insulating layer having a third concentration higher than the second concentration, and

a second substrate in contact with the third insulating layer on the third insulating layer, the second substrate including silicon.

6 . The semiconductor package of claim 5 , further comprising:

a first recess on a surface of the first substrate facing the second substrate, the first recess recessed toward an inside of the first substrate; and

a second recess on a surface of the second substrate facing the first substrate, the second recess recessed toward an inside of the second substrate,

wherein the first insulating layer fills an inside of the first recess, and the third insulating layer fills an inside of the second recess.

7 . The semiconductor package of claim 1 , wherein

the structure includes a second substrate in contact with the second insulating layer on the second insulating layer, and

the second substrate includes silicon.

8 . The semiconductor package of claim 1 , wherein the structure includes

a third insulating layer in contact with the second insulating layer on the second insulating layer, the third insulating layer including silicon oxide, the third insulating layer having a third concentration of silicon, the third concentration higher than the second concentration, and

a wiring pattern inside the third insulating layer, the wiring pattern including a conductive material.

9 . The semiconductor package of claim 1 , wherein the structure includes

a third insulating layer in contact with the second insulating layer on the second insulating layer, the third insulating layer including silicon oxide, the third insulating layer having a third concentration of silicon, the third concentration higher than the second concentration, and

a semiconductor chip in contact with the third insulating layer on the third insulating layer.

10 . The semiconductor package of claim 9 , further comprising:

a first conductive terminal surrounded by each of the first insulating layer and the second insulating layer, the first conductive terminal in contact with the first substrate; and

a second conductive terminal surrounded by each of the second insulating layer and the third insulating layer, the second conductive terminal in contact with the semiconductor chip, and the second conductive terminal connected to the first conductive terminal.

11 . The semiconductor package of claim 9 , further comprising:

a first conductive terminal surrounded by the first insulating layer, the first conductive terminal in contact with the first substrate;

a second conductive terminal surrounded by the third insulating layer, the second conductive terminal in contact with the semiconductor chip; and

a connecting terminal connecting the first conductive terminal and the second conductive terminal, the connecting terminal surrounded by each of the first insulating layer, the second insulating layer and the third insulating layer.

12 . The semiconductor package of claim 9 , wherein at least a part of side walls of the second insulating layer is in contact with the first insulating layer.

13 . A semiconductor package comprising:

a first substrate including silicon;

a first insulating layer in contact with the first substrate on the first substrate, the first insulating layer including silicon oxide, the first insulating layer having a first concentration of silicon;

a second insulating layer in contact with the first insulating layer on the first insulating layer, the second insulating layer including silicon oxide, the second insulating layer having a second concentration of silicon, the second concentration lower than the first concentration;

a third insulating layer in contact with the second insulating layer on the second insulating layer, the third insulating layer including silicon oxide, the third insulating layer having a third concentration of silicon, the third concentration higher than the second concentration; and

a structure disposed on the third insulating layer,

wherein the first concentration is a ratio of a weight of silicon included in the first insulating layer to a total weight of the first insulating layer,

wherein the second concentration is a ratio of a weight of silicon included in the second insulating layer to a total weight of the second insulating layer, and

wherein the third concentration is a ratio of a weight of silicon included in the third insulating layer to a total weight of the third insulating layer.

14 . The semiconductor package of claim 13 , wherein

each of the first concentration and third concentration is in a range from 20 wt % to 50 wt %, and

the second concentration is in a range from 5 wt % to 20 wt %.

15 . The semiconductor package of claim 13 , wherein a thickness of the second insulating layer is smaller than each of a thickness of the first insulating layer and a thickness of the third insulating layer.

16 . The semiconductor package of claim 13 , wherein

the structure includes a second substrate in contact with the third insulating layer on the third insulating layer, and

the structure includes silicon.

17 . The semiconductor package of claim 13 , further comprising:

a wiring pattern inside the third insulating layer, the wiring pattern including a conductive material.

18 . The semiconductor package of claim 13 , further comprising:

a semiconductor chip in contact with the third insulating layer on the third insulating layer.

19 . The semiconductor package of claim 18 , wherein each of a width of the second insulating layer in a horizontal direction and a width of the third insulating layer in the horizontal direction is smaller than a width of the first insulating layer in the horizontal direction.

20 . A semiconductor package comprising:

a first substrate including silicon;

a first insulating layer in contact with the first substrate on the first substrate, the first insulating layer including silicon oxide, the first insulating layer having a first concentration of silicon;

a second insulating layer in contact with the first insulating layer on the first insulating layer, the second insulating layer including silicon oxide, the second insulating layer having a second concentration of silicon, the second concentration lower than the first concentration;

a third insulating layer in contact with the second insulating layer on the second insulating layer, the third insulating layer including silicon oxide, the third insulating layer having a third concentration of silicon, the third concentration higher than the second concentration; and

a second substrate in contact with the third insulating layer on the third insulating layer, the second substrate including silicon,

wherein the first concentration is a ratio of a weight of silicon included in the first insulating layer to a total weight of the first insulating layer,

wherein the second concentration is a ratio of a weight of silicon included in the second insulating layer to a total weight of the second insulating layer,

wherein the third concentration is a ratio of a weight of silicon included in the third insulating layer to a total weight of the third insulating layer,

wherein a thickness of the second insulating layer is smaller than each of a thickness of the first insulating layer and a thickness of the third insulating layer,

wherein each of the first concentration and the third concentration is in a range from 20 wt % to 50 wt %, and

wherein the second concentration is in a range from 5 wt % to 20 wt %.