Wafer holder and method

1 . A wafer holder for holding a semiconductor wafer during electrochemical porosification with an electrolyte, the wafer holder comprising:

a housing for receiving the semiconductor wafer;

an aperture in the housing, through which an upper surface of the semiconductor wafer is exposable to the electrolyte;

a seal extending around the aperture, for preventing the ingress of electrolyte into the housing; and

an electrical contact for making an electrical connection with the semiconductor wafer,

in which the housing comprises a backing section configured to contact a bottom surface of the semiconductor wafer, and a front section configured to contact the upper surface of the semiconductor wafer, the front section comprising the aperture, and in which the backing section comprises a resilient o-ring configured to support the semiconductor wafer when the semiconductor wafer is inserted into the housing.

2 . A wafer holder according to claim 1 , in which the electrical contact is configured to contact the upper surface and/or an outer edge of the semiconductor wafer.

3 . A wafer holder according to claim 2 , in which the electrical contact is configured to make an electrical connection with the upper surface of the semiconductor wafer between the seal and the edge of the upper surface.

4 . A wafer holder according to claim 1 , in which the housing is configured so that edges of the semiconductor wafer are not exposable to the electrolyte.

5 . A wafer holder according to claim 1 , in which the aperture is configured to be smaller than the upper surface of the semiconductor wafer to be received in the housing, so that only a portion of the upper surface of the semiconductor wafer is exposable to the electrolyte.

6 . A wafer holder according to claim 1 , in which the electrical contact is configured to make an electrical connection with a portion of the semiconductor wafer that is not exposed to the electrolyte.

7 . A wafer holder according to claim 1 , in which the electrical contact is provided in a sealed portion of the housing, so that the electrical contact is not exposable to the electrolyte.

8 . A wafer holder according to claim 1 , in which the electrical contact is configured to be biased against the semiconductor wafer.

9 . A wafer holder according to claim 1 , in which the housing comprises a plurality of electrical contacts arranged to contact the semiconductor wafer at a plurality of positions around a perimeter of the semiconductor wafer.

10 . A wafer holder according to claim 9 , in which the housing comprises two, or three, or four, or five, or six or eight or more electrical contacts arranged around the housing for contacting the semiconductor wafer at a plurality of positions around the perimeter of the semiconductor wafer.

11 . A wafer holder according to claim 9 , in which the plurality of electrical contacts are spaced evenly around the housing to contact the semiconductor wafer at a plurality of equidistant positions.

12 . A wafer holder according to claim 1 , in which the housing is configured to receive a circular semiconductor wafer with a radius R, and in which the aperture is a circular aperture with a radius r, in which r<R.

13 . A wafer holder according to claim 1 , in which the housing is openable for insertion and removal of the semiconductor wafer.

14 . A wafer holder according to claim 1 , in which the backing section and the front section of the housing are connectable to one another by a plurality of releasable fasteners.

15 . A wafer holder according to claim 1 , comprising an electrical lead that connects the electrical contacts to a power source.

16 . A wafer holder according to claim 1 , in which the housing is formed from acid-resistant plastic.

17 . A wafer holder according to claim 1 , in which the housing is configured to receive a semiconductor wafer with a diameter of 1 inch (2.54 cm), or 2 inches (5.08 cm), or 6 inches (15.24 cm), or 8 inches (20.36 cm), or 12 inches (30.48 cm) or 16 inches (40.72 cm).

18 . A method comprising using the wafer holder according to claim 1 during electrochemical porosification of a semiconductor wafer.

19 . A method of electrochemical porosification of a semiconductor wafer, comprising:

placing a semiconductor wafer in the wafer holder according to claim 1 ;

immersing the housing in an electrolyte, so that the upper surface of the semiconductor wafer is exposed to electrolyte through the aperture; and

applying a potential difference between the semiconductor wafer and the electrolyte.

20 . A method according to claim 19 , in which the semiconductor wafer has a sub-surface structure of a first III-nitride material, having a charge carrier density greater than 5×10 17 cm −3 , beneath a surface layer of a second III-nitride material, having a charge carrier density of less than 1×10 17 cm −3 , so that the sub-surface structure is porosified by electrochemical etching, while the surface layer is not porosified.

21 . A method according to claim 20 , in which the surface layer and the sub-surface structure comprise III-nitride materials selected from the list consisting of: GaN, AlGaN, InGaN, InAlN and AlInGaN.

22 . A method according to claim 19 , comprising photo-electrochemically etching the semiconductor wafer by illuminating the upper surface of the semiconductor wafer while the potential difference is applied.

23 . A porous semiconductor wafer formed by the wafer holder method according to claim 19 .