Pattern-based hierarchy exploration for compressing an integrated circuit design layout

1 . A method, comprising:

partitioning an integrated circuit (IC) design layout into a set of content areas, wherein at least two adjacent content areas in the set of content areas overlap with each other;

dividing a content area in the set of content areas into a set of zones based on an image-based representation of the content area;

determining a repetition unit in a zone in the set of zones, wherein the repetition unit is a portion of the zone, and wherein the zone includes multiple instances of the repetition unit, and wherein determining the repetition unit in the zone in the set of zones comprises:

determining a set of bash values c rest or ding to a set of detection boxes aligned with different polygon corners in the zone;

selecting a hash value in the set of hash values; and

selecting a detection box that corresponds to the hash value; and

generating, by a processing device, a skeleton layout corresponding to the IC design layout, wherein the skeleton layout specifies locations of the multiple instances of the repetition unit in the IC design layout.

2 . The method of claim 1 , wherein the partitioning the IC design layout into the set of content areas comprises:

partitioning the IC design layout into a set of abutting tiles; and

creating the set of content areas based on the set of abutting tiles, wherein each content area in the set of content areas is larger than and encloses a corresponding tile in the set of abutting tiles.

3 . The method of claim 1 , wherein the dividing the content area in the set of content areas into the set of zones comprises using an image-based boundary detection technique to detect a zone boundary in the content area.

4 . The method of claim 3 , wherein the dividing the content area in the set of content areas into the set of zones comprises moving the zone boundary so that the zone boundary aligns with an edge of a polygon which is located within an ambit of the zone boundary.

5 . The method of claim 1 , further comprising:

selecting an instance of the repetition unit from the multiple instances of the repetition unit specified in the skeleton layout;

performing mask correction on the instance of the repetition unit to obtain a corrected repetition unit; and

replacing the multiple instances of the repetition unit by the corrected repetition unit in the IC design layout.

6 . The method of claim 1 , wherein the partitioning the IC design layout into the set of content areas is performed by a master node of a distributed processing (DP) system which includes the master node and a set of DP nodes, wherein the dividing the content area in the set of content areas into the set of zones is performed by a DP node in the set of DP nodes, wherein the determining the repetition unit in the zone in the set of zones is performed by the DP node in the set of DP nodes, and wherein the generating the skeleton layout corresponding to the IC design layout is performed by the master node.

7 . A non-transitory computer-readable medium comprising stored instructions, which when executed by a processor, cause the processor to:

partition an integrated circuit (IC) design layout into a set of content areas;

divide a content area in the set of content areas into a set of zones based on an image-based representation of the content area, wherein dividing the content area in the set of content areas into the set of zones comprises using an image-based boundary detection technique to detect a zone boundary in the content area;

determine a repetition unit in a zone in the set of zones, wherein the repetition unit is a portion of the zone, and wherein the zone includes multiple instances of the repetition unit; and

generate a skeleton layout corresponding to the IC design layout, wherein the skeleton layout specifies locations of the multiple instances of the repetition unit in the IC design layout.

8 . The non-transitory computer-readable medium of claim 7 , wherein partitioning the IC design layout into the set of content areas comprises:

partitioning the IC design layout into a set of abutting tiles; and

creating the set of content areas based on the set of abutting tiles, wherein each content area in the set of content areas is larger than and encloses a corresponding tile in the set of abutting tiles.

9 . The non-transitory computer-readable medium of claim 7 , wherein dividing the content area in the set of content areas into the set of zones comprises moving the zone boundary so that the zone boundary aligns with an edge of a polygon which is located within an ambit of the zone boundary.

10 . The non-transitory computer-readable medium of claim 7 , wherein determining the repetition unit in the zone in the set of zones comprises:

determining a set of hash values corresponding to a set of detection boxes aligned with different polygon corners in the zone;

selecting a hash value in the set of hash values; and

selecting a detection box that corresponds to the hash value.

11 . The non-transitory computer-readable medium of claim 7 , further comprising instructions, which when executed by the processor, cause the processor to:

select an instance of the repetition unit from the multiple instances of the repetition unit specified in the skeleton layout;

perform mask correction on the instance of the repetition unit to obtain a corrected repetition unit; and

replace the multiple instances of the repetition unit by the corrected repetition unit in the IC design layout.

12 . The non-transitory computer-readable medium of claim 7 , wherein partitioning the IC design layout into the set of content areas is performed by a master node of a distributed processing (DP) system which includes the master node and a set of DP nodes, wherein dividing the content area in the set of content areas into the set of zones is performed by a DP node in the set of DP nodes, wherein determining the repetition unit in the zone in the set of zones is performed by the DP node in the set of DP nodes, and wherein generating the skeleton layout corresponding to the IC design layout is performed by the master node.

13 . An apparatus, comprising:

a master node;

a set of distributed processing (DP) nodes;

wherein the master node comprises:

a first memory storing first instructions;

a first processor, coupled with the first memory and to execute the first instructions, the first instructions when executed causing the first processor to:

partition an integrated circuit (IC) design layout into a set of content areas;

provide a content area to a DP node in the set of DP nodes;

receive a repetition unit from the DP node; and

generate a skeleton layout corresponding to the IC design layout, wherein the skeleton layout specifies locations of multiple instances of the repetition unit in the IC design layout; and

wherein the DP node comprises:

a second memory storing second instructions;

a second processor, coupled with the second memory and to execute the second instructions, the second instructions when executed causing the second processor to:

receive the content area from the master node;

divide the content area into a set of zones based on an image-based representation of the content area;

determine a repetition unit in a zone in the set of zones, wherein the repetition unit is a portion of the zone, and wherein the zone includes the multiple instances of the repetition unit; and

provide the repetition unit to the master node.

14 . The apparatus of claim 13 , wherein partitioning the IC design layout into the set of content areas comprises:

partitioning the IC design layout into a set of abutting tiles; and

creating the set of content areas based on the set of abutting tiles, wherein each content area in the set of content areas is larger than and encloses a corresponding tile in the set of abutting tiles.

15 . The apparatus of claim 13 , wherein dividing the content area in the set of content areas into the set of zones comprises using an image-based boundary detection technique to detect a zone boundary in the content area.

16 . The apparatus of claim 15 , wherein dividing the content area in the set of content areas into the set of zones comprises moving the zone boundary so that the zone boundary aligns with an edge of a polygon which is located within an ambit of the zone boundary.

17 . The apparatus of claim 13 , wherein determining the repetition unit in the zone in the set of zones comprises:

determining a set of hash values corresponding to a set of detection boxes aligned with different polygon corners in the zone;

selecting a hash value in the set of hash values; and

selecting a detection box that corresponds to the hash value.

18 . The apparatus of claim 13 , wherein the first instructions, which when executed by the first processor, cause the first processor to:

select an instance of the repetition unit from the multiple instances of the repetition unit specified in the skeleton layout;

perform mask correction on the instance of the repetition unit to obtain a corrected repetition unit; and

replace the multiple instances of the repetition unit by the corrected repetition unit in the IC design layout.