Highly charged nickel ion optical clock and its implementation

1 . A highly charged Nickel ion optical clock including an optical clock system and an FPGA control system, characterized in that the optical clock system includes a cryogenic ion trap system, a highly charged ions source, an ion beamline system, a ultraviolet fluorescence collection system, a laser modulation system, a servo feedback circuit, an optical frequency comb, and clock signal output system, the highly charged ions source outputs a pulsed beam of highly charged Nickel ions to the ion beamline system, the ion beamline system filters out the pulse beam of Ni 12+ ions, collimates and decelerates it, and outputs it to the cryogenic ion trap system, the cryogenic ion system prepares and traps Be + ions, and also traps Ni 12+ ions, the laser modulation system outputs a swept laser to the cryogenic ion trap system to excite Ni 12+ ions to an excited state, Ni 12+ ions transmit external state information to Be + ions, Be + ions emit a 313 nm fluorescence signal, and the ultraviolet fluorescence collection system collects the 313 nm fluorescence signal emitted by Be + ions to obtain the spectral line shape of Ni 12+ ion transition and outputs it to the servo feedback circuit, the servo feedback circuit calculates the spectral line center value of Ni 12+ ion transition, and the servo feedback circuit outputs an error signal to the laser modulation system based on the spectral line center value, the laser modulation system shifts the output laser frequency according to the error signal, so that the shifted laser frequency locks to the spectral line center value of Ni 12+ ion transition, the laser modulation system outputs the locked laser to the optical frequency comb, which in turn generates an optical frequency comb, measure the laser frequency of the locked laser, and the optical frequency comb outputs the measured laser frequency to the FPGA Control system, FPGA control system outputs clock signals to clock signal output system, clock signal output system outputs clock signals, FPGA control system is also connected to the cryogenic ion trap system, ion beamline system, ultraviolet fluorescence collection system, laser modulation system, optical frequency comb, and clock signal output system through timing control signal lines.

2 . A highly charged Nickel ion clock according to claim 1 , characterized in that the clock system further includes a 313 nm Doppler cooling laser system, a 313 nm repumping laser system, and a 313 nm Raman sideband cooling laser system, the 313 nm Doppler cooling laser system and the 313 nm repumping laser system respectively output 313 nm Doppler cooling laser and 313 nm repumping laser to the cryogenic ion trap system for Doppler cooling of Be + ions, and Ni 12+ ions are sympathetically cooled; The 313 nm Raman sideband cooling laser system outputs the 313 nm Raman sideband cooling laser to the cryogenic ion trap system for Raman sideband cooling of Be + ions after Doppler cooling, and Ni 12+ ions are sympathetically cooled to the vibrational quantum ground state; The FPGA control system is also connected to the 313 nm Doppler cooling laser system, 313 nm repumping laser system, and 313 nm Raman sideband cooling laser system respectively through timing control signal lines.

3 . A highly charged Nickel ion clock according to claim 2 , characterized in that the laser modulation system includes a first laser modulation module, which includes a first acousto-optic modulator and a 498 nm narrow linewidth laser, the 498 nm narrow linewidth laser outputs 498 nm narrow linewidth laser to the laser input terminal of the first acousto-optic modulator, a servo feedback circuit outputs an error signal to the modulation input terminal of the first acousto-optic modulator, and the laser output terminal of the first acousto-optic modulator outputs 498 nm narrow linewidth swept-frequency laser or 498 nm narrow linewidth frequency-shifted laser, the FPGA control system is also connected to the first acousto-optic modulator and the 498 nm narrow linewidth laser through timing control signal lines; When using the first acousto-optic modulator and 498 nm narrow linewidth laser, the FPGA control system outputs the first clock signal to the clock signal output system, which outputs the first clock signal.

4 . A highly charged Nickel ion clock according to claim 3 , characterized in that the laser modulation system further includes a second laser modulation module, the second laser modulation module includes a second acousto-optic modulator and a 511 nm narrow linewidth laser, the 511 nm narrow linewidth laser outputs a 511 nm narrow linewidth laser to the laser input terminal of the second acousto-optic modulator, the servo feedback circuit outputs an error signal to the modulation input terminal of the second acousto-optic modulator, and the laser output terminal of the second acousto-optic modulator outputs a 511 nm narrow linewidth swept-frequency laser or a 511 nm narrow linewidth frequency-shifted laser, the FPGA control system is also connected to the second acousto-optic modulator and the 511 nm narrow-linewidth laser via a timing control signal line, when the second acousto-optic modulator and the 511 nm narrow linewidth laser are adopted, the FPGA control system outputs a second clock signal to the clock signal output system, and the clock signal output system outputs the second clock signal.

5 . A method for implementing a highly charged Nickel ion clock, utilizing the highly charged Nickel ion clock as claimed in claim 4 , characterized in that it includes the following steps:

Step 1: The FPGA control system activates the cryogenic ion trap system to prepare and trap Be + ions,

Step 2: The FPGA control system activates the 313 nm Doppler cooling laser system and the 313 nm repumping laser system to perform Doppler cooling on Be + ions,

Step 3: The highly charged ions source generates a pulsed beam of highly charged Nickel ions, the FPGA control system activates the ion beamline system to filter out the pulsed beam of Ni 12+ ions, which is then collimated, decelerated, and output to the cryogenic ion trap system, the cryogenic ion trap system traps the Ni 12+ ions, and the Ni 12+ ions are sympathetically cooled by Be + ions,

Step 4: The FPGA control system activates the 313 nm Raman sideband cooling laser system to perform Raman sideband cooling on the Be + ions that have undergone Doppler cooling, the Ni 12+ ions are sympathetically cooled to the vibrational quantum ground state by the Be + ions,

Step 5: The FPGA control system activates the 498 nm narrow linewidth laser generated by the 498 nm narrow linewidth laser system, and performs frequency shifting on the laser via the first acousto-optic modulator, the frequency-shifted 498 nm narrow linewidth laser acts on the Ni 12+ ions in the vibrational quantum ground state, exciting the Ni 12+ ions to the first excited state, the Ni 12+ ions transfer external state information to the Be + ions, and the Be + ions emit a 313 nm fluorescence signal,

Step 6: The FPGA control system activates the ultraviolet fluorescence collection system to detect and collect the 313 nm fluorescence signal emitted by Be + ions, and outputs the 313 nm fluorescence signal to the servo feedback circuit,

Step 7: The FPGA control system controls the first acousto-optic modulator to perform frequency sweeping on the 498 nm narrow linewidth laser, the first acousto-optic modulator outputs the swept-frequency laser to the cryogenic ion trap system, the ultraviolet fluorescence collection system synchronously detects and collects the 313 nm fluorescence signal emitted by Be + ions, obtaining the spectral line shape of the 498 nm transition of Ni 12+ ions,

Step 8: The ultraviolet fluorescence collection system transmits the spectral line shape of the 498 nm transition of Ni 12+ ions to the servo feedback circuit, the servo feedback circuit calculates the spectral line center value of the 498 nm transition of Ni 12+ ions, and then calculates the deviation of the 313 nm fluorescence signal from this spectral line center value, it then feeds back an error signal to the first acousto-optic modulator, based on the error signal, the acousto-optic modulator performs frequency shifting on the 498 nm narrow linewidth laser, locking the laser frequency of the 498 nm narrow linewidth laser to the spectral line center value of the 498 nm transition of Ni 12+ ions,

Step 9: The first acousto-optic modulator outputs the 498 nm narrow linewidth laser with a locked laser frequency to the optical frequency comb for beat frequency generation, the laser frequency value of the 498 nm narrow linewidth laser (after laser frequency locking) is measured and output to the FPGA control system, the FPGA control system outputs the first clock signal to the clock signal output system, and the clock signal output system outputs the first clock signal,

Step 10: Set an initial clock reference, the FPGA control system controls the optical clock system to cycle through Step 2 through 9 ten times at a set period based on the initial clock reference,

Step 11: The FPGA control system switches the 498 nm narrow linewidth laser system to the 511 nm narrow linewidth laser system, and switches the first acousto-optic modulator to the second acousto-optic modulator, the 511 nm narrow linewidth laser system generates 511 nm narrow linewidth laser, and the second acousto-optic modulator performs frequency shifting and frequency sweeping on the 511 nm narrow linewidth laser, then repeats Step 1 through 10,

Step 12: Repeat Step 1 through 11, the clock signal output system alternately outputs the first clock signal and the second clock signal, and the first clock signal and the second clock signal verify each other.

6 . The method of implementing a highly charged Nickel ion optical clock according to claim 5 , characterized in that Step 11 specifically includes the following process: the FPGA control system switches the 498 nm narrow linewidth laser system to the 511 nm narrow linewidth laser system, switches the first acousto-optic modulator to the second acousto-optic modulator, and the 511 nm narrow linewidth laser system generates 511 nm narrow linewidth laser and the second acousto-optic modulator to shift and sweep the 511 nm narrow linewidth laser, repeats Step 1 through 5, and excites the Ni 12+ ions to the second excited state; repeats Step 6 and 7, and the ultraviolet fluorescence collection system obtains the spectral line shape of 511 nm transition of Ni 12+ ions; Repeat Step 7, the servo feedback circuit calculates the spectral line center value of the 511 nm transition of Ni 12+ ions, and the acousto-optic modulator locks the laser frequency of the 511 nm narrow line width laser to the spectral line center value of the 511 nm transition of Ni 12+ ions; repeats Step 8 and 9, the FPGA control system outputs the second clock signal to the clock signal output system, and the clock signal output system outputs the second clock signal; repeats Step 10, the FPGA control system controls the optical clock system with the first clock signal as the clock reference to set the cycle ten times.

7 . The method of implementing a highly charged Nickel ion optical clock according to claim 6 , characterized in that when Step 10 is executed for the first time, the FPGA control system outputs the first clock signal with the initial clock reference as the clock reference, and then the clock signal outputted by the previous clock signal is used as the clock reference for each output clock signal.

8 . The method of implementing a highly charged Nickel ion optical clock according to claim 7 , characterized in that in Step 11, the first clock signal and the second clock signal are verified to each other by the following method:

The FPGA control system records the laser frequency value f 1 of the locked 498 nm narrow linewidth laser and the laser frequency value f 2 of the locked 511 nm narrow linewidth laser respectively, and obtains the initial ratio R 0 of f 1 and f 2 based on the first recorded laser frequency value f 1 and laser frequency value f 2 , after that, after recording the new f 2 each time, R is calculated and the ratio R of the new f 1 and the new f 2 is checked, and checks whether R is equal to R 0 , if R is equal to R 0 , then it is checked as a normal state; if R is not equal to R 0 , then it is checked as a fault state.