Secure controllers for replaceable print apparatus components

1 . A secure controller for a replaceable print apparatus component, wherein the controller is to perform secure communication with a host apparatus via a serial data bus, wherein the controller comprises a memory storing a cryptographic key, wherein the controller is to perform secure communication by one or both of (i) generating authenticated cryptographic responses to the host apparatus using the cryptographic key and (ii) validating authenticated messages from the host apparatus using the cryptographic key, wherein the controller is to:

in response to a first command from the host apparatus, execute a first operation associated with the first command, wherein the first operation comprises at least one of: computing a session key, generating a session key identifier, generating a message authentication code, or determining a response to a cryptographic challenge, wherein the controller is to consume power within a first range during execution of the first operation, wherein the controller is to maintain the power consumption of the controller within the first range during the execution of the first operation by one or both of smoothing the power consumption and jamming the power consumption; and

in response to a second command from the host apparatus specifying a dwell time, wherein the second command is associated with a non-cryptographic operation comprising performing a physical measurement of the replaceable print apparatus component, transition to a low-power state and consume power within a second range in the low-power state for a first duration based on the dwell time, the second range being below the first range, and maintain the power consumption within the second range by regulating a supply current drawn by the controller during the first duration, wherein an upper limit of the second range is less than a lower limit of the first range.

2 . The secure controller of claim 1 , wherein a standard deviation of the power consumption of the controller during the execution of the first operation is less than 20% of an average power consumption of the controller during the execution of the first operation, or wherein an average power consumption of the controller in the low-power state is less than 20% of the average power consumption of the controller during the execution of the first operation, wherein the average power consumption of the controller in the low-power state is within the second range and the average power consumption of the controller during the execution of the first operation is within the first range.

3 . The secure controller of claim 1 , wherein the upper limit of the second range is less than 50% of the lower limit of the first range.

4 . The secure controller of claim 1 , comprising a timer having a frequency that is independent of a clock frequency on the serial data bus, wherein the controller is configured to run the timer during the low-power state to determine when the first duration based on the dwell time has elapsed.

5 . The secure controller of claim 1 , wherein the low-power state is a low-power monitoring state for monitoring for expiry of the first duration based on the dwell time specified in the second command, and wherein the controller is to generate a non-default voltage condition on the serial data bus in the low-power state while consuming power within the second range.

6 . The secure controller of claim 1 , wherein the controller comprises serial bus interfaces including data, clock, power, and/or ground, whereby the controller is configured to

generate a low voltage condition on the data interface in response to the second command specifying the dwell time for a second duration based on the dwell time of the second command, wherein the second duration is equal to or different from the first duration, and

generate the low-power state on an interface other than the data interface, in response to the second command for the first duration, wherein the controller consumes power within the second range during the low-power state.

7 . The secure controller of claim 1 , wherein the controller, in response to the second command specifying the dwell time, is to generate (i) a non-default voltage condition on a line of the serial data bus during a first point in time and during a second point in time, the first and second points in time being separated by a duration based on the dwell time or (ii) the low-power state on a line of the serial data bus during a third point in time and during a fourth point in time, the third and fourth points in time being separated by a duration based on the dwell time, wherein the controller consumes power within the second range during the low-power state.

8 . Circuitry for association with a replaceable print apparatus component, the circuitry comprising a serial data bus interface that is to interface with a serial data bus of a host apparatus, wherein the circuitry comprises a memory storing a cryptographic key, wherein the circuitry is to perform secure communication by one or both of (i) generating authenticated cryptographic responses to the host apparatus using the cryptographic key and (ii) validating authenticated messages from the host apparatus using the cryptographic key, wherein the circuitry is to:

in response to a first command received from the host apparatus via the serial data bus, the first command being associated with a cryptographic operation, execute the cryptographic operation in a default-power state, wherein the cryptographic operation comprises at least one of: computing a session key, generating a session key identifier, generating a message authentication code, or determining a response to a cryptographic challenge, wherein the circuitry is to consume power within a first range during execution of the cryptographic operation, wherein the circuitry is to maintain the power consumption of the circuitry within the first range during the execution of the cryptographic operation by one or both of smoothing the power consumption and jamming the power consumption; and

in response to a second command received from the host apparatus via the serial data bus specifying a dwell time, the second command being associated with a non-cryptographic operation comprising performing a physical measurement of the replaceable print apparatus component, enter a low-power state associated with the non-cryptographic operation for executing the non-cryptographic operation and consume power within a second range in the low-power state for a first duration based on the dwell time, wherein the second range is below the first range, and maintain the power consumption within the second range by regulating a supply current drawn by the circuitry during the first duration, wherein an upper limit of the second range is less than a lower limit of the first range.

9 . The circuitry of claim 8 , wherein the second command specifies a time period corresponding to the dwell time and the circuitry is to exit the low-power state upon expiry of a duration based on the time period, wherein the circuitry consumes power within the second range during the low-power state.

10 . The circuitry of claim 8 , wherein the circuitry further is to enter a standby state upon completion of execution of an operation, the standby state differing from the low-power state in at least one of an exit condition for exiting the respective state and a supply current of the circuitry in the respective state, wherein the low-power state is associated with the non-cryptographic operation and the circuitry consumes power within the second range in the low-power state.

11 . The circuitry of claim 8 , wherein the supply current of the circuitry in the default-power state is within a predefined first current band corresponding to the first range, and wherein the supply current of the circuitry in the low-power state is within a predefined second current band corresponding to the second range, wherein an upper limit of the second current band is less than a lower limit of the first current band.

12 . The circuitry of claim 11 , further comprising a current regulator, wherein the current regulator is to maintain the supply current of the circuitry to be within the predefined first current band corresponding to the first range in the default-power state and/or within the predefined second current band corresponding to the second range in the low-power state, wherein the upper limit of the second current band is less than the lower limit of the first current band.

13 . The circuitry of claim 8 , wherein the second command specifying the dwell time is authenticated by the host apparatus and the circuitry, in response to the second command, is to confirm authentication of the second command in the default-power state prior to entering the low-power state for executing the non-cryptographic operation, wherein the circuitry consumes power within the second range in the low-power state for the first duration based on the dwell time.

14 . The circuitry of claim 8 , wherein one or both of:

the host apparatus is to sample a supply current on the serial data bus after issuing the first command associated with the cryptographic operation and the circuitry is to be in the default-power state consuming power within the first range at least at an expected sampling time at which the host apparatus is expected to sample the supply current after issuing the first command; and

the host apparatus is to sample the supply current on the serial data bus after issuing the second command specifying the dwell time and the circuitry is to be in the low-power state consuming power within the second range at least at an expected sampling time at which the host apparatus is expected to sample the supply current after issuing the second command, wherein the upper limit of the second range is less than the lower limit of the first range.

15 . A replaceable print apparatus component comprising:

a serial bus interface to communicate with a host over a serial bus; and

logic, wherein the logic comprises a memory storing a cryptographic key, wherein the logic is to perform secure communication by one or both of (i) generating authenticated cryptographic responses to the host using the cryptographic key and (ii) validating authenticated messages from the host using the cryptographic key,

wherein the logic, in response to a command sent by the host over the serial bus to an address associated with the logic, is to:

depending on a type of the command sent to the address associated with the logic, selectively transition to either a first power mode or a second power mode for executing an operation associated with the received command, wherein the operation comprises at least one of: computing a session key, generating a session key identifier, generating a message authentication code, or determining a response to a cryptographic challenge when in the first power mode, wherein the command specifies a dwell time when associated with the second power mode, wherein the second power mode is associated with a non-cryptographic operation comprising performing a physical measurement of the replaceable print apparatus component, wherein the logic is to consume power within a first range during the first power mode, wherein the logic is to maintain the power consumption of the logic within the first range during the first power mode by one or both of smoothing the power consumption and jamming the power consumption and consume power within a second range in the second power mode for a first duration based on the dwell time, the second range being below the first range, and maintain the power consumption within the second range by regulating a supply current drawn by the logic during the first duration, wherein an upper limit of the second range is less than a lower limit of the first range.

16 . The replaceable print apparatus component of claim 15 , wherein the logic is to,

in the first power mode, draw a supply current in a first current range corresponding to the first range over the serial bus, and,

in the second power mode, draw a supply current in a reduced-current range corresponding to the second range over the serial bus, the reduced-current range being less than, and distanced from, the first current range, wherein an upper limit of the reduced-current range is less than a lower limit of the first current range,

wherein a center of the reduced-current range is less than 20% of a center of the first current range.

17 . The replaceable print apparatus component of claim 16 , wherein the logic is further to,

depending on the type of command sent to the address associated with the logic, transition to either the first power mode, the second power mode or a third power mode, and

in the third power mode, draw a supply current in a broadened current range over the serial bus, the broadened current range being broader than the first current range corresponding to the first range and the reduced-current range corresponding to the second range and extending at least between the first current range and the reduced-current range, wherein the upper limit of the reduced-current range is less than the lower limit of the first current range.

18 . The replaceable print apparatus component of claim 17 , wherein one or both of the first and second power modes are regulated power modes in which the supply current drawn by the logic over the serial bus is regulated and the third power mode is an unregulated power mode in which the supply current drawn by the logic over the serial bus is unregulated, wherein the first power mode corresponds to the first range and the second power mode corresponds to the second range, wherein the upper limit of the second range is less than the lower limit of the first range.

19 . The replaceable print apparatus component of claim 15 , wherein the logic is to:

draw the supply current within the first range in the first power mode for a duration based on a time period specified in the command sent to the address associated with the logic; and/or

draw the supply current within the second range in the second power mode for a duration based on a time period specified in the command sent to the address associated with the logic, wherein the upper limit of the second range is less than the lower limit of the first range.