Protocol state aware power management

1 . A network interface device for implementing protocol state aware power management, comprising:

circuitry to provide a direct memory access interface;

medium access control (MAC) circuitry to interface with a network; and

control circuitry to:

classify a first plurality of packets received at the MAC circuitry as packets used to open network connections or packets used to close the network connections;

maintain statistics of synchronize (SYN) packets used to open the network connections and finish/reset (FIN/RST) packets used to close the network connections;

calculate a power hint based on the statistics of packets used to open connections and packets used to close network connections, the power hint calculated from the statistics of SYN packets and FIN/RST packets, and statistics of transport layer security (TLS) packets, observed over a monitoring period; and

write data to a host memory using the direct memory access interface, the data including a power hint field with the power hint, the power hint used by a host processor to scale processor power based on the power hint.

2 . The network interface device of claim 1 , wherein to calculate the power hint, the control circuitry is to use to a weighted formula.

3 . The network interface device of claim 1 , wherein the control circuitry is to:

classify a second plurality of packets received at the MAC circuitry as packets that include encrypted data; and

maintain statistics of packets with encrypted data,

wherein the power hint is based in part on the statistics of packets with encrypted data.

4 . The network interface device of claim 1 , wherein the control circuitry is to maintain statistics of a window size used during receiving packets, wherein the power hint is based in part on the statistics of the window size.

5 . The network interface device of claim 1 , wherein the data includes a receive descriptor that is a 16-byte write back descriptor.

6 . The network interface device of claim 1 , wherein the power hint field is a 3-bit field.

7 . The network interface device of claim 1 , wherein to scale processor power, the host processor is to adjust a processor frequency based on the power hint, the processor frequency used by the host processor to process subsequent network traffic.

8 . The network interface device of claim 1 , wherein to scale processor power, the host processor is to adjust a processor voltage based on the power hint, the processor voltage used by the host processor to process subsequent network traffic.

9 . The network interface device of claim 1 , wherein to calculate the power hint, the control circuitry is to:

assign a first weight to the statistics of SYN packets;

assign a second weight to the statistics of FIN/RST packets;

assign a third weight to the statistics of TLS packets; and

combine the weighted statistics to generate a numerical power hint value.

10 . The network interface device of claim 1 , wherein the host processor is to use the power hint to:

map the power hint to a target processor power state selected from a plurality of predefined power states; and

transition to the target processor power state before processing subsequent packets received from the network interface device.

11 . A method for implementing protocol state aware power management in a network interface device, comprising:

classifying a first plurality of packets received at a medium access control (MAC) circuitry as packets used to open network connections or packets used to close the network connections;

maintaining statistics of synchronize (SYN) packets used to open the network connections and finish/reset (FIN/RST) packets used to close the network connections;

calculating a power hint based on the statistics of packets used to open connections and packets used to close network connections, the power hint calculated from the statistics of SYN packets and FIN/RST packets, and statistics of transport layer security (TLS) packets, observed over a monitoring period; and

writing data to a host memory using a direct memory access interface, the data including a power hint field with the power hint, the power hint used by a host processor to scale processor power based on the power hint.

12 . The method of claim 11 , wherein calculating the power hint comprises using a weighted formula.

13 . The method of claim 11 , comprising:

classifying a second plurality of packets received at the MAC circuitry as packets that include encrypted data; and

maintaining statistics of packets with encrypted data, wherein the power hint is based in part on the statistics of packets with encrypted data.

14 . The method of claim 11 , comprising maintaining statistics of a window size used during receiving packets, wherein the power hint is based in part on the statistics of the window size.

15 . The method of claim 11 , wherein the data includes a receive descriptor that is a 16-byte write back descriptor.

16 . The method of claim 11 , wherein the power hint field is a 3-bit field.

17 . The method of claim 11 , wherein to scale processor power, the host processor is to adjust a processor frequency based on the power hint, the processor frequency used by the host processor to process subsequent network traffic.

18 . The method of claim 11 , wherein to scale processor power, the host processor is to adjust a processor voltage based on the power hint, the processor voltage used by the host processor to process subsequent network traffic.

19 . At least one machine-readable medium including instructions for implementing protocol state aware power management in a network interface device, which when executed by a network interface device, cause the network interface device to perform operations comprising:

classifying a first plurality of packets received at a medium access control (MAC) circuitry as packets used to open network connections or packets used to close the network connections;

maintaining statistics of synchronize (SYN) packets used to open the network connections and finish/reset (FIN/RST) packets used to close the network connections;

calculating a power hint based on the statistics of packets used to open connections and packets used to close network connections, the power hint calculated from the statistics of SYN packets and FIN/RST packets, and statistics of transport layer security (TLS) packets, observed over a monitoring period; and

writing data to a host memory using a direct memory access interface, the data including a power hint field with the power hint, the power hint used by a host processor to scale processor power based on the power hint.

20 . The at least one machine-readable medium of claim 19 , wherein to calculate the power hint, the instructions cause the network interface device to use to a weighted formula.

21 . The at least one machine-readable medium of claim 19 , wherein the instructions cause the network interface device to:

classify a second plurality of packets received at the MAC circuitry as packets that include encrypted data; and

maintain statistics of packets with encrypted data,

wherein the power hint is based in part on the statistics of packets with encrypted data.

22 . A computing system for implementing protocol state aware power management, comprising:

a host processor; and

a network interface device, comprising:

circuitry to provide a direct memory access interface;

medium access control (MAC) circuitry to interface with a network; and

control circuitry to:

classify a first plurality of packets received at the MAC circuitry as packets used to open network connections or packets used to close the network connections;

maintain statistics of synchronize (SYN) packets used to open the network connections and finish/reset (FIN/RST) packets used to close the network connections;

calculate a power hint based on the statistics of packets used to open connections and packets used to close network connections, the power hint calculated from the statistics of SYN packets and FIN/RST packets, and statistics of transport layer security (TLS) packets, observed over a monitoring period; and

write data to a host memory using the direct memory access interface, the data including a power hint field with the power hint;

wherein the host processor uses the power hint to scale processor power based on the power hint.

23 . The computing system of claim 22 , wherein to calculate the power hint, the control circuitry is to use to a weighted formula.

24 . The computing system of claim 22 , wherein the control circuitry is to:

classify a second plurality of packets received at the MAC circuitry as packets that include encrypted data; and

maintain statistics of packets with encrypted data,

wherein the power hint is based in part on the statistics of packets with encrypted data.