A memory device includes a first memory column, a memory array and a sign decoder. The first memory column is configured to store first sign bits. The memory array is configured to store a first data array and generate bit line signals. The sign decoder is configured to output data signals according to the first sign bits and the bit line signals. The data signals correspond to a second data array, and the first data array is generated by reversing rows of the second data array according to the first sign bits.
1 . A method, comprising:
generating a minimum difference according to a row quantity of a first data array and a column quantity of the first data array;
formulating the first data array into a matrix;
updating a first vector according to the matrix and the generated minimum difference until the first vector conforms to the generated minimum difference;
generating a plurality of sign bits according to the first vector;
reversing rows of the first data array according to the plurality of sign bits generated according to the first vector to generate a second data array; and
storing the second data array and the plurality of sign bits generated according to the first vector into a memory device.
2 . The method of claim 1 , further comprising:
generating the first vector;
generating a second vector according to the first vector and the matrix;
comparing a first absolute value of a first component of the second vector with the generated minimum difference; and
in response to the first absolute value smaller than or equal to the generated minimum difference, determining the first vector for generating the plurality of sign bits.
3 . The method of claim 2 , wherein the first absolute value is the largest one among the absolute values of the components of the second vector.
4 . The method of claim 2 , further comprising:
in response to the first absolute value larger than the generated minimum difference, flipping one of components of the first vector, to decrease the first absolute value.
5 . The method of claim 4 , further comprising:
flipping the one of the components of the first vector, to generate a third vector;
calculating a second absolute value according to a fourth vector in the matrix and the third vector;
comparing the second absolute value and the first absolute value; and
in response to the second absolute value smaller than the first absolute value, replacing the first vector by the third vector.
6 . The method of claim 5 , further comprising:
in response to the second absolute value larger than or equal to the first absolute value, flipping another one of the components of the first vector, to update the third vector.
7 . The method of claim 5 , further comprising:
comparing the first component with zero; and
in response to the first component larger than zero, flipping a second component of the first vector,
wherein the second component is equal to a third component of the matrix, and
a row number of the third component is equal to a column number of the second component, and a column number of the third component is equal to a column number of the first component.
8 . The method of claim 7 , further comprising:
in response to the first component smaller than or equal to zero, flipping a fourth component of the first vector,
wherein the fourth component is not equal to a fifth component of the matrix, and
a row number of the fifth component is equal to a column number of the fourth component, and a column number of the fifth component is equal to the column number of the first component.
9 . The method of claim 7 , further comprising:
when the first vector is generated, setting a counter number to an initial value;
after the first vector is updated, increasing the counter number;
comparing the counter number with a limit number;
in response to the counter number smaller than the limit number, generating the second vector with the updated first vector; and
in response to the counter number larger than or equal to the limit number, setting the counter number to the initial value and generating the first vector again.
10 . The method of claim 9 , wherein when a size of the first data array is increased, the limit number is increased.
11 . A method, comprising:
generating a minimum difference according to a row quantity of a first data array and a column quantity of the first data array;
formulating the first data array into a matrix;
updating a first vector according to the matrix and the generated minimum difference until the first vector conforms to the generated minimum difference;
generating a plurality of sign bits according to the first vector;
reversing rows of the first data array according to the plurality of sign bits generated according to the first vector to generate a second data array;
storing the second data array and the plurality of sign bits generated according to the first vector into a memory device; and
outputting a plurality of data signals corresponding to the first data array according to the plurality of sign bits generated according to the first vector.
12 . The method of claim 11 , further comprising:
generating a plurality of bit line signals by a memory array;
receiving a first bit line signal of the plurality of bit line signals by an inverter; and
outputting one of the plurality of data signals according to the plurality of sign bits by a multiplexer,
wherein a first input terminal of the multiplexer is configured to receive the first bit line signal, and
a second input terminal of the multiplexer is coupled to an output terminal of the inverter.
13 . The method of claim 11 , further comprising:
generating the first vector;
generating a second vector according to the first vector and the matrix;
comparing a first absolute value of a first component of the second vector with the generated minimum difference; and
in response to the first absolute value smaller than or equal to the generated minimum difference, determining the first vector for generating the plurality of sign bits.
14 . The method of claim 13 , wherein the first absolute value is the largest one among the absolute values of the components of the second vector.
15 . The method of claim 13 , further comprising:
in response to the first absolute value larger than the generated minimum difference, flipping one of components of the first vector, to decrease the first absolute value.
16 . The method of claim 15 , further comprising:
flipping the one of the components of the first vector, to generate a third vector;
calculating a second absolute value according to a fourth vector in the matrix and the third vector;
comparing the second absolute value and the first absolute value; and
in response to the second absolute value smaller than the first absolute value, replacing the first vector by the third vector.
17 . A method, comprising:
generating a minimum difference according to a row quantity of a first data array and a column quantity of the first data array;
formulating the first data array into a matrix;
updating a first vector according to the matrix and the generated minimum difference until the first vector conforms to the generated minimum difference;
generating a plurality of sign bits according to the first vector;
reversing rows of the first data array according to the plurality of sign bits generated according to the first vector to generate a second data array;
manufacturing a memory device storing the second data array and the plurality of sign bits generated according to the first vector; and
outputting the first data array by the memory device according to the second data array and the plurality of sign bits generated according to the first vector.
18 . The method of claim 17 , further comprising:
generating the first vector;
generating a second vector according to the first vector and the matrix;
comparing a first absolute value of a first component of the second vector with the generated minimum difference;
in response to the first absolute value smaller than or equal to the generated minimum difference, determining the first vector for generating the plurality of sign bits; and
in response to the first absolute value larger than the generated minimum difference, flipping one of components of the first vector, to decrease the first absolute value.
19 . The method of claim 18 , further comprising:
flipping the one of the components of the first vector, to generate a third vector;
calculating a second absolute value according to a fourth vector in the matrix and the third vector;
comparing the second absolute value and the first absolute value; and
in response to the second absolute value smaller than the first absolute value, replacing the first vector by the third vector.
20 . The method of claim 19 , further comprising:
in response to the second absolute value larger than or equal to the first absolute value, flipping another one of the components of the first vector, to update the third vector.