IP Library Granted Patent US 12687978
Granted Patent B1
US 12687978 · App. 19/073,511 · Granted Jul 21, 2026

Encrypted and compressed data transfer with performance optimization

Inventors: Srihari Siddabathula (St. Charles, MO); Neelima Mumgandi (St. Peters, MO); Michael Sean Green (St. Charles, MO)
Assignee: Charter Communications
G06F3/064G06F3/0626G06F3/0673G06F21/602
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Quick Facts
Patent No.
US 12687978
App. No.
19/073,511
Granted
Jul 21, 2026
Kind
B1
Abstract

A communication system communication system has a source location that communicates with a destination location via a network topology. A data extraction and processing gateway of the source location has a source CPU that divides and distributes incoming data to source GPU cores that transform, encrypt, and compress different blocks of data in parallel. A queue and transmission gateway of the source location has a traffic analyzer that transmits enqueued processed blocks of data via the network topology. The destination location has a loading gateway having a destination CPU that distributes received processed blocks of data to destination GPU cores that decompress, decode, and detransform the processed blocks of data in parallel to recover the blocks of data, which the CPU assembles for further processing.

Claims (38)

1 . An apparatus for a communication system having a source location that communicates with a destination location via a network topology, the source location having a data extraction and processing gateway and a queue and transmission gateway and the destination location having a loading gateway, the apparatus comprising at least one of the data extraction and processing gateway, the queue and transmission gateway, and the loading gateway, wherein:

the source location comprises at least one source central processing unit (CPU) and at least one source graphics processing unit (GPU) having multiple source GPU cores, wherein:

the source CPU is configured to divide incoming data into blocks and distribute the blocks of data to the source GPU cores;

the source GPU cores are configured to transform, encrypt, and compress different blocks of data in parallel to generate processed blocks of data; and

the source CPU is configured to forward the processed blocks to data to the queue and transmission gateway;

the queue and transmission gateway comprises receive buffers, a traffic analyzer, and forwarding agents, wherein:

the receive buffers are configured to store the processed blocks of data received from the data extraction and processing gateway;

the traffic analyzer is configured to analyze transmission of the processed blocks of data from the queue and transmission gateway to the loading gateway via the network topology to dynamically adjust the routing of the processed blocks of data through the network topology; and

the forwarding agents are configured to forward the processed blocks of data stored in the receive buffers for transmission to the loading gateway; and

the loading gateway comprises staging buffers, at least one destination CPU, and at least one destination GPU having multiple destination GPU cores, wherein:

the staging buffers are configured to store the processed blocks of data received from the queue and transmission gateway via the network topology;

the destination CPU is configured to distribute the processed blocks of data to the destination GPU cores;

the destination GPU cores are configured to decompress, decode, and detransform the processed blocks of data in parallel to recover the blocks of data; and

the destination CPU is configured to assemble the recovered blocks of data for further processing.

2 . The apparatus of claim 1 , wherein the apparatus comprises the data extraction and processing gateway.

3 . The apparatus of claim 2 , wherein the apparatus further comprises the queue and transmission gateway.

4 . The apparatus of claim 3 , wherein the apparatus further comprises the loading gateway.

5 . The apparatus of claim 1 , wherein the apparatus comprises the loading gateway.

6 . The apparatus of claim 1 , wherein the communication system comprises multiple loading gateways.

7 . A method for a communication system having a source location that communicates with a destination location via a network topology, the source location having a data extraction and processing gateway and a queue and transmission gateway and the destination location having a loading gateway, wherein:

the source location comprises at least one source central processing unit (CPU) and at least one source graphics processing unit (GPU) having multiple source GPU cores, wherein:

the source CPU divides incoming data into blocks and distributes the blocks of data to the source GPU cores;

the source GPU cores transform, encrypt, and compress different blocks of data in parallel to generate processed blocks of data; and

the source CPU forwards the processed blocks to data to the queue and transmission gateway;

the queue and transmission gateway comprises receive buffers, a traffic analyzer, and forwarding agents, wherein:

the receive buffers store the processed blocks of data received from the data extraction and processing gateway;

the traffic analyzer analyzes transmission of the processed blocks of data from the queue and transmission gateway to the loading gateway via the network topology to dynamically adjust the routing of the processed blocks of data through the network topology; and

the forwarding agents forward the processed blocks of data stored in the receive buffers for transmission to the loading gateway; and

the loading gateway comprises staging buffers, at least one destination CPU, and at least one destination GPU having multiple destination GPU cores, wherein:

the staging buffers store the processed blocks of data received from the queue and transmission gateway via the network topology;

the destination CPU distributes the processed blocks of data to the destination GPU cores;

the destination GPU cores decompress, decode, and detransform the processed blocks of data in parallel to recover the blocks of data; and

the destination CPU assembles the recovered blocks of data for further processing.

8 . The method of claim 7 , wherein the method is performed by the data extraction and processing gateway.

9 . The method of claim 8 , wherein the method is further performed by the queue and transmission gateway.

10 . The method of claim 9 , wherein the method is further performed by the loading gateway.

11 . The method of claim 7 , wherein the method is performed by the loading gateway.

12 . The method of claim 7 , wherein the communication system comprises multiple loading gateways.