Non-periodic power, current, and thermal limits management
A method for non-periodic limits mitigation is described. The method includes monitoring operation of each processor thread during thread pipeline execution. The method also includes detecting a limits management condition based on each of the processor threads during the thread pipeline execution. The method further includes controlling application of a limits mitigation operation to perform non-periodic application of the limits mitigation operation to the thread pipeline execution.
1 . A method for non-periodic limits mitigation, the method comprising:
monitoring operation of each processor thread during thread pipeline execution;
detecting a limits management condition based on each of the processor threads during the thread pipeline execution; and
controlling application of a limits mitigation operation to perform non-periodic application of the limits mitigation operation to the thread pipeline execution,
wherein controlling application of the limits mitigation operation comprises accessing configuration register values to configure a dither control circuit, and
wherein the dither control circuit comprises a modulation block and a random number generator block selected according to the configuration register values.
2 . The method of claim 1 , in which controlling application of the limits mitigation operation comprises providing a dither control to perturb application of the limits mitigation operation.
3 . The method of claim 1 , in which controlling application of the limits mitigation operation comprises modulating application of the limits mitigation operation.
4 . The method of claim 1 , in which controlling application of the limits mitigation operation comprises randomly applying the limits mitigation operation.
5 . The method of claim 1 , in which the limits mitigation operation comprises a throttle control signal applied to the thread pipeline execution.
6 . The method of claim 1 , in which the dither control circuit is integrated with a multi-threaded processor.
7 . The method of claim 1 , in which controlling application of the limits mitigation operation comprises modulating application of a throttle control signal to the thread pipeline execution.
8 . The method of claim 1 , in which detecting the limits management condition comprises detecting a power limits condition, a current limits condition, and/or a thermal limits condition.
9 . A non-periodic limits mitigation system, comprising:
a multi-threaded processor comprising a dither control circuit to control application of a limits mitigation operation to perform non-periodic application of the limits mitigation operation to a thread pipeline execution when a limits management condition is detected based on the thread pipeline execution of the multi-threaded processor,
wherein the dither control circuit comprises a modulation block and a random number generator block selected according to configuration register values.
10 . The non-periodic limits mitigation system of claim 9 , in which the dither control circuit is further to perturb application of the limits mitigation operation.
11 . The non-periodic limits mitigation system of claim 9 , in which the dither control circuit is further to modulate application of the limits mitigation operation.
12 . The non-periodic limits mitigation system of claim 9 , in which the dither control circuit is further to randomly apply the limits mitigation operation.
13 . The non-periodic limits mitigation system of claim 9 , in which the limits mitigation operation comprises a throttle control signal applied to the thread pipeline execution.
14 . The non-periodic limits mitigation system of claim 9 , in which the multi-threaded processor is configured to access configuration register values to configure the dither control circuit.
15 . The non-periodic limits mitigation system of claim 9 , in which the dither control circuit is integrated with a limits management hardware (LMH).
16 . The non-periodic limits mitigation system of claim 9 , in which the dither control circuit is further to modulate application of a throttle control signal to the thread pipeline execution.
17 . The non-periodic limits mitigation system of claim 9 , in which the limits management condition comprises a power limits condition, a current limits condition, and/or a thermal limits condition.