Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration
Multi-tile Memory Management for Detecting Cross Tile Access, Providing Multi-Tile Inference Scaling with multicasting of data via copy operation, and Providing Page Migration are disclosed herein. In one embodiment, a graphics processor for a multi-tile architecture includes a first graphics processing unit (GPU) having a memory and a memory controller, a second graphics processing unit (GPU) having a memory and a cross-GPU fabric to communicatively couple the first and second GPUs. The memory controller is configured to determine whether frequent cross tile memory accesses occur from the first GPU to the memory of the second GPU in the multi-GPU configuration and to send a message to initiate a data transfer mechanism when frequent cross tile memory accesses occur from the first GPU to the memory of the second GPU.
1 . An apparatus comprising:
graphics processing circuitry comprising a first graphics processing unit (GPU) including a first local memory and a memory controller, and a second GPU including a second local memory, wherein the graphics processing circuitry to:
facilitate the memory controller to send a message to a graphics driver to initiate data transfer when frequent cross tile memory accesses occur between the first and second GPUs, wherein content of the data transfer is accessed by the first GPU via the first local memory and by the second GPU via the second local memory; and
perform a page allocation to the first local memory when a first access to a page occurs in the second local memory, wherein the graphics processing circuitry is further to enable split frame between the first GPU and the second GPU.
2 . The apparatus of claim 1 , wherein, based on the contents of the data transfer, the first GPU to handle rendering for a first portion of a display and the second GPU to handle rendering for a second portion of the display, wherein the second portion is different from the first portion, wherein the graphics processing circuitry is further to facilitate the first GPU to determine whether frequent cross tile memory accesses occur between the first and second GPUs.
3 . The apparatus of claim 1 , wherein the data transfer between the first and second GPUs is initiated in response to the graphics driver receiving the message from the memory controller.
4 . The apparatus of claim 1 , wherein the data transfer allows for accessing a page table to provide a translation of virtual addresses to physical addresses.
5 . A method comprising:
facilitating, by graphics processing circuitry of a computing device, the memory controller to send a message to a graphics driver to initiate data transfer when frequent cross tile memory accesses occur between a first graphics processing unit (GPU) and a second GPU having a first local memory and a second local memory, respectively, wherein content of the data transfer is accessed by the first GPU via the first local memory and by the second GPU via the second local memory, wherein the first GPU includes a memory controller; and
performing a page allocation to the first local memory when a first access to a page occurs in the second local memory, wherein the graphics processing circuitry is further to enable split frame between the first GPU and the second GPU.
6 . The method of claim 5 , wherein, based on the contents of the data transfer, the first GPU to handle rendering for a first portion of a display and the second GPU to handle rendering for a second portion of the display, wherein the second portion is different from the first portion, wherein the graphics processing circuitry is further to facilitate the first GPU to determine whether frequent cross tile memory accesses occur between the first and second GPUs.
7 . The method of claim 5 , wherein the data transfer between the first and second GPUs is initiated in response to the graphics driver receiving the message from the memory controller.
8 . The method of claim 5 , wherein the data transfer allows for accessing a page table to provide a translation of virtual addresses to physical addresses.
9 . At least one non-transitory computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:
facilitating, by graphics processing circuitry of the computing device, the memory controller to send a message to a graphics driver to initiate data transfer when frequent cross tile memory accesses occur between a first graphics processing unit (GPU) and a second GPU having a first local memory and a second local memory, respectively, wherein content of the data transfer is accessed by the first GPU via the first local memory and by the second GPU via the second local memory, wherein the first GPU includes a memory controller; and
performing a page allocation to the first local memory when a first access to a page occurs in the second local memory, wherein the graphics processing circuitry is further to enable split frame between the first GPU and the second GPU.
10 . The non-transitory computer-readable medium of claim 9 , wherein, based on the contents of the data transfer, the first GPU to handle rendering for a first portion of a display and the second
GPU to handle rendering for a second portion of the display, wherein the second portion is different from the first portion, wherein the graphics processing circuitry is further to facilitate the first GPU to determine whether frequent cross tile memory accesses occur between the first and second GPUs.
11 . The non-transitory computer-readable medium of claim 9 , wherein the data transfer between the first and second GPUs is initiated in response to the graphics driver receiving the message from the memory controller.
12 . The method of claim 5 , wherein the data transfer allows for accessing a page table to provide a translation of virtual addresses to physical addresses.