IP Library Granted Patent US 12688805
Granted Patent B2
US 12688805 · App. 18/288,956 · Granted Jul 21, 2026

Display device

Inventor: Junichi Yamada (Kameyama City, JP)
Assignee: Sharp Display Technology Corporation
G09G3/006G09G3/3648G09G2330/06G09G2330/12
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Quick Facts
Patent No.
US 12688805
App. No.
18/288,956
Granted
Jul 21, 2026
Kind
B2
Abstract

A display device includes a semiconductor chip mounted in a frame region arranged around a display region, and a video protection circuit formed in the frame region, and the video protection circuit includes a low power supply connection portion formed between the semiconductor chip and the display region, and a high power supply connection portion formed under the semiconductor chip.

Claims (43)

1 . A display device comprising:

a semiconductor chip mounted in a frame region arranged around a display region in which a plurality of pixels of a display panel is formed; and

a peripheral circuit formed in the frame region,

wherein the peripheral circuit includes an off-chip division circuit formed between the semiconductor chip and the display region, and an under-chip division circuit formed under the semiconductor chip,

wherein the display panel includes a plurality of panel terminals to which a plurality of respective output terminals of the semiconductor chip is joined, and

wherein the peripheral circuit is a video protection circuit configured to protect the plurality of pixels from static electricity entering through the plurality of panel terminals.

2 . The display device according to claim 1 ,

wherein the semiconductor chip includes a plurality of input terminals arrayed along a longitudinal direction of the semiconductor chip and the plurality of respective output terminals arrayed along the longitudinal direction,

the peripheral circuit further includes a thin film transistor on the display panel,

the off-chip division circuit is formed, in the frame region, in a region between the array of the plurality of respective output terminals and the display region, and

the under-chip division circuit is formed, in the frame region, in a region between the array of the plurality of input terminals and the array of the plurality of respective output terminals.

3 . The display device according to claim 1 , further comprising:

a pixel circuit configured to control the plurality of pixels,

wherein the off-chip division circuit and the under-chip division circuit include a thin film transistor that is formed of a same material in a same layer, and that protects or inspects the pixel circuit.

4 . The display device according to claim 1 ,

wherein the video protection circuit includes a first potential circuit connected to a first potential power supply having a first potential, and a second potential circuit connected to a second potential power supply having a second potential higher than the first potential,

the off-chip division circuit includes one of the first potential circuit and the second potential circuit, and

the under-chip division circuit includes the other one of the first potential circuit and the second potential circuit.

5 . The display device according to claim 4 ,

wherein a plurality of first potential circuits, including the first potential circuit, is arranged corresponding to the plurality of panel terminals, and

the first potential power supply is provided in common for the plurality of first potential circuits.

6 . The display device according to claim 1 , further comprising:

a first wiring line configured to connect the plurality of panel terminals and the under-chip division circuit; and

a second wiring line configured to connect the plurality of panel terminals, the off-chip division circuit, and the plurality of pixels.

7 . The display device according to claim 1 ,

wherein

the plurality of panel terminals is arrayed in a staggered array in which the plurality of panel terminals is arrayed obliquely to one another, and

the peripheral circuit includes a plurality of peripheral circuit elements arrayed in the staggered array corresponding to the plurality of panel terminals.

8 . The display device according to claim 1 ,

wherein each of the plurality of pixels includes a self-luminous display element or a liquid crystal display element.

9 . A display device comprising:

a semiconductor chip mounted in a frame region arranged around a display region in which a plurality of pixels of a display panel is formed; and

a peripheral circuit formed in the frame region,

wherein the peripheral circuit includes an off-chip division circuit formed between the semiconductor chip and the display region, and an under-chip division circuit formed under the semiconductor chip, and

wherein the off-chip division circuit and the under-chip division circuit are circuits having a same shape.

10 . The display device according to claim 9 ,

wherein the semiconductor chip includes a plurality of input terminals arrayed along a longitudinal direction of the semiconductor chip and a plurality of output terminals arrayed along the longitudinal direction,

the peripheral circuit further includes a thin film transistor on the display panel,

the off-chip division circuit is formed, in the frame region, in a region between the array of the plurality of output terminals and the display region, and

the under-chip division circuit is formed, in the frame region, in a region between the array of the plurality of input terminals and the array of the plurality of output terminals.

11 . The display device according to claim 9 , further comprising:

a pixel circuit configured to control the plurality of pixels,

wherein the off-chip division circuit and the under-chip division circuit include a thin film transistor formed of a same material in a same layer, and protect or inspect the pixel circuit.