Known-failure error handling in a memory sub-system
A system and method for a memory device for detecting, by a processing device, a failure exhibited by a set of cells of a memory device, estimating a severity of the failure, identifying, based on the severity of the failure, a failed subset of cells of the set of cells, and copying data from the failed subset of cells to a second set of cells of the memory device.
1 . A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, the processing device to perform operations comprising:
detecting a failure exhibited by a first set of cells of the memory device;
estimating a severity of the failure;
identifying, based on the severity of the failure, a failed subset of cells of the first set of cells;
copying data from the failed subset of cells to a second set of cells of the memory device;
identifying an adjacent subset of cells of the first set of cells that are adjacent to the failed subset of cells; and
programming first dummy data to the failed subset of cells and second dummy data to the adjacent subset of cells.
2 . The system of claim 1 , wherein estimating the severity of the failure further comprises:
determining whether the failure exhibited by the first set of cells corresponds to a known-failure mode; and
initiating a verification operation based on the known-failure mode.
3 . The system of claim 2 , wherein determining whether the failure exhibited by the first set of cells corresponds to the known-failure mode further comprises:
determining whether metadata associated with the first set of cells satisfies a threshold condition of one or more known-failure identifiers of the known-failure mode.
4 . The system of claim 1 , wherein the failure is caused by a physical defect of the failed subset of cells.
5 . The system of claim 1 , wherein estimating the severity of the failure further comprises:
responsive to determining that a voltage distribution of a set of voltage distributions for the first set of cells has shifted, determining a voltage shift of the voltage distribution; and
adjusting an estimate of the severity of the failure based on the voltage shift.
6 . The system of claim 1 , the operations further comprising:
identifying the first set of cells as a partially failed set of cells.
7 . The system of claim 1 , the operations further comprising:
precluding the first set of cells from being used by a memory write operation.
8 . A method comprising:
detecting, by a processing device, a failure exhibited by a first set of cells of a memory device;
estimating a severity of the failure;
identifying, based on the severity of the failure, a failed subset of cells of the first set of cells;
copying data from the failed subset of cells to a second set of cells of the memory device;
identifying an adjacent subset of cells of the first set of cells that are adjacent to the failed subset of cells; and
programming first dummy data to the failed subset of cells and second dummy data to the adjacent subset of cells.
9 . The method of claim 8 , wherein estimating the severity of the failure further comprises:
determining whether the failure exhibited by the first set of cells corresponds to a known-failure mode; and
initiating a verification operation based on the known-failure mode.
10 . The method of claim 9 , wherein determining whether the failure exhibited by the first set of cells corresponds to the known-failure mode further comprises:
determining whether metadata associated with the first set of cells satisfies a threshold condition of one or more known-failure identifiers of the known-failure mode.
11 . The method of claim 8 , wherein the failure is caused by a physical defect of the failed subset of cells.
12 . The method of claim 8 , wherein estimating the severity of the failure further comprises:
responsive to determining that a voltage distribution of a set of voltage distributions for the first set of cells has shifted, determining a voltage shift of the voltage distribution; and
adjusting an estimate of the severity of the failure based on the voltage shift.
13 . The method of claim 8 , further comprising:
identifying the first set of cells as a partially failed set of cells.
14 . The method of claim 8 , further comprising:
precluding the first set of cells from being used by a memory write operation.
15 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
detecting a failure exhibited by a first set of cells of a memory device;
estimating a severity of the failure;
identifying, based on the severity of the failure, a failed subset of cells of the first set of cells; and
copying data from the failed subset of cells to a second set of cells of the memory device;
identifying an adjacent subset of cells of the first set of cells that are adjacent to the failed subset of cells; and
programming first dummy data to the failed subset of cells and second dummy data to the adjacent subset of cells.
16 . The non-transitory computer-readable storage medium of claim 15 , the operations further comprising:
determining whether metadata associated with the first set of cells satisfies a threshold condition of one or more known-failure identifiers of a known-failure mode.
17 . The non-transitory computer-readable storage medium of claim 15 , the operations further comprising:
identifying the first set of cells as a partially failed set of cells; and
precluding the partially failed set of cells from being used by a memory write operation.