Digital phase shifter

1 . A digital phase shifter comprising:

a plurality of digital phase shift circuit groups in which a plurality of digital phase shift circuits are connected in cascade;

one or more relay digital phase shift circuits provided between two digital phase shift circuit groups; and

two or more bend-type connection units configured to connect one of the two digital phase shift circuit groups to the relay digital phase shift circuit and connect the other of the two digital phase shift circuit groups to the relay digital phase shift circuit,

wherein each of the digital phase shift circuits and the relay digital phase shift circuits includes at least a signal line, a pair of inner lines provided at both sides of the signal line, a pair of outer lines provided outside of the inner lines, a first ground conductor connected to one end of each of the inner lines and the outer lines, a second ground conductor connected to the other end of each of the outer lines, and a pair of electronic switches provided between the other ends of the inner lines and the second ground conductor,

wherein each of the digital phase shift circuits and the relay digital phase shift circuits is a circuit set in a low-delay mode in which a return current flows through the inner line or a high-delay mode in which a return current flows through the outer line, and

wherein at least one of the digital phase shift circuits constituting at least one digital phase shift circuit group and the relay digital phase shift circuits is a mitigation circuit configured to mitigate a distribution of phase shift amounts.

2 . The digital phase shifter according to claim 1 , wherein the mitigation circuit includes at least one of:

a first mitigation circuit that is a digital phase shift circuit of the plurality of digital phase shift circuits having a larger phase shift amount than the digital phase shift circuit other than the mitigation circuit and that is configured to mitigate a recess portion in the distribution of phase shift amounts; and

a second mitigation circuit that is another digital phase shift circuit of the plurality of digital phase shift circuits having a smaller phase shift amount than the digital phase shift circuit other than the mitigation circuit and that is configured to mitigate a projection portion in the distribution of phase shift amounts.

3 . The digital phase shifter according to claim 2 , wherein each of the digital phase shift circuits and the relay digital phase shift circuits includes

a capacitor electrically connected between the signal line and at least one of the first ground conductor and the second ground conductor; and

an electronic switch configured to switch between whether or not to connect the capacitor between the signal line and at least one of the first ground conductor and the second ground conductor.

4 . The digital phase shifter according to claim 3 , wherein a control of whether to set the mode as the low-delay mode or the high-delay mode in the digital phase shift circuit and the relay digital phase shift circuit is started from the digital phase shift circuit which is located at a side in which the capacitor is provided between two digital phase shift circuits located at an outermost side and is sequentially performed in a connection order of the digital phase shift circuits and the relay digital phase shift circuits.

5 . The digital phase shifter according to claim 4 , wherein at least one of the digital phase shift circuits constituting at least one digital phase shift circuit group is the first mitigation circuit.

6 . The digital phase shifter according to claim 4 , wherein each of at least one relay digital phase shift circuit, at least one digital phase shift circuit located in front of at least one relay digital phase shift circuit, and at least one digital phase shift circuit located behind at least one relay digital phase shift circuit is the second mitigation circuit.

7 . The digital phase shifter according to claim 4 , wherein at least one digital phase shift circuit located in front of at least one relay digital phase shift circuit or at least one digital phase shift circuit located behind at least one relay digital phase shift circuit is the second mitigation circuit.

8 . The digital phase shifter according to claim 4 ,

wherein at least one digital phase shift circuit located behind at least one relay digital phase shift circuit is the first mitigation circuit,

wherein at least one digital phase shift circuit located in front of at least one relay digital phase shift circuit is the second mitigation circuit, and

wherein each of the digital phase shift circuit for which the control process is started and at least one digital phase shift circuit consecutive to the digital phase shift circuit is the first mitigation circuit.

9 . The digital phase shifter according to claim 4 ,

wherein at least one of the digital phase shift circuits constituting at least one digital phase shift circuit group whose both ends are connected to the connection units is the second mitigation circuit,

wherein at least one digital phase shift circuit located behind at least one relay digital phase shift circuit is the first mitigation circuit, and

wherein each of the digital phase shift circuit in which the control process is started and at least one digital phase shift circuit consecutive to the digital phase shift circuit is the first mitigation circuit.

10 . The digital phase shifter according to claim 3 , wherein a control of whether to set the mode as the low-delay mode or the high-delay mode in the digital phase shift circuit and the relay digital phase shift circuit is started from the digital phase shift circuit which is located at a side in which the capacitor is not provided between two digital phase shift circuits located at an outermost side and is sequentially performed in a connection order of the digital phase shift circuits and the relay digital phase shift circuits.

11 . The digital phase shifter according to claim 10 , wherein each of at least one relay digital phase shift circuit, at least one digital phase shift circuit located in front of at least one relay digital phase shift circuit, and at least one digital phase shift circuit located behind at least one relay digital phase shift circuit is the first mitigation circuit.

12 . The digital phase shifter according to claim 10 , wherein at least one digital phase shift circuit located in front of at least one relay digital phase shift circuit is the first mitigation circuit.

13 . The digital phase shifter according to claim 10 ,

wherein at least one of the digital phase shift circuits constituting at least one digital phase shift circuit group whose both ends are connected to the connection units is the first mitigation circuit and at least one of the digital phase shift circuits constituting the at least one digital phase shift circuit group whose both ends are connected to the connection units is the second mitigation circuit, and

wherein at least one digital phase shift circuit constituting the digital phase shift circuit group from which a signal is output is the first mitigation circuit.

14 . The digital phase shifter according to claim 3 ,

wherein the first mitigation circuit satisfies at least one of a condition that a length of the first mitigation circuit is longer than that of the digital phase shift circuit other than the mitigation circuit, a condition that a distance between the signal line and the inner line in the first mitigation circuit is shorter than that in the digital phase shift circuit other than the mitigation circuit, a condition that a distance between the signal line and the outer line in the first mitigation circuit is longer than that in the digital phase shift circuit other than the mitigation circuit, a condition that the capacitor of the first mitigation circuit is larger than that of the digital phase shift circuit other than the mitigation circuit, and a condition that the pair of electronic switches of the first mitigation circuit are larger than those of the digital phase shift circuit other than the mitigation circuit, and

wherein the second mitigation circuit satisfies at least one of a condition that a length of the second mitigation circuit is shorter than that of the digital phase shift circuit other than the mitigation circuit, a condition that a distance between the signal line and the inner line in the second mitigation circuit is longer than that in the digital phase shift circuit other than the mitigation circuit, a condition that a distance between the signal line and the outer line in the second mitigation circuit is shorter than that in the digital phase shift circuit other than the mitigation circuit, a condition that the capacitor of the second mitigation circuit is smaller than that of the digital phase shift circuit other than the mitigation circuit, and a condition that the pair of electronic switches of the second mitigation circuit are smaller than those of the digital phase shift circuit other than the mitigation circuit.

15 . The digital phase shifter according to claim 1 , wherein the connection unit includes:

a first connection line configured to connect the signal line of a digital phase shift circuit of the plurality of digital phase shift circuits located at an end of one or the other of two digital phase shift circuit groups and the signal line of the relay digital phase shift circuit;

a second connection line configured to connect the inner line of the digital phase shift circuit located at an end of one or the other of two digital phase shift circuit groups and the inner line of the relay digital phase shift circuit;

a ground layer arranged in at least one of an upward direction and a downward direction of the first connection line and the second connection line; and

a via-hole configured to connect at least the second connection line and the ground layer.

16 . The digital phase shifter according to claim 15 , wherein the connection unit includes a third connection line configured to connect the outer line of the digital phase shift circuit located at an end of one or the other of two digital phase shift circuit groups and the outer line of the relay digital phase shift circuit.