IP Library Granted Patent US 12689294
Granted Patent B2
US 12689294 · App. 18/762,523 · Granted Jul 21, 2026

Synchronous boost circuits with enhanced zero voltage switching and methods for operating the same

Inventor: Victor Sinow (Fresno, CA)
Assignee: Navitas Semiconductor Limited
H02M3/158H02M1/0009H02M1/0058H03K17/6871H02M3/155H02M3/156H02M3/157H03K2217/0063H03K2217/0072H03K2217/0081
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12689294
App. No.
18/762,523
Granted
Jul 21, 2026
Kind
B2
Abstract

A method of operating a circuit is disclosed. The method includes providing an input terminal and a ground terminal coupled to a power supply, providing an output terminal and the ground terminal coupled to a load, providing a low-side circuit comprising a low-side power switch coupled between a switch node and the ground terminal, providing a high-side circuit comprising a high-side power switch coupled between the switch node and the output terminal, providing an inductor coupled between the switch node and the input terminal, detecting, by a controller, a valley of a voltage at the switch node, transmitting a signal, by the low-side circuit, to the high-side circuit in response to the controller detecting the valley, and turning on, by the high-side circuit, the high-side power switch for a time interval sufficient to generate a negative current in the inductor in response to receiving the signal.

Claims (47)

1 . A circuit comprising:

an input terminal and a ground terminal coupled to a power supply;

an output terminal and the ground terminal coupled to a load;

a low-side circuit comprising a low-side power switch coupled between a switch node and the ground terminal;

a high-side circuit comprising a high-side power switch coupled between the switch node and the output terminal;

an inductor coupled between the switch node and the input terminal; and

a controller arranged to detect a valley of a voltage at the switch node;

wherein in response to detecting the valley, the low-side circuit transmits a signal to the high-side circuit;

wherein in response to receiving the signal, the high-side circuit turns on the high-side power switch for a time interval sufficient to generate a negative current in the inductor, and then turns off the high-side power switch causing the voltage at the switch node to transition to zero volts; and

wherein the low-side circuit is arranged to turn on the low-side power switch in response to the voltage at the switch node at zero volts.

2 . The circuit of claim 1 , wherein the high-side circuit determines the time interval sufficient to generate a negative current in the inductor based on a duty cycle of a pulse width modulated (PWM) signal received from the controller, and a value of a resistor.

3 . The circuit of claim 1 , wherein the low-side circuit further comprises a first current sense device arranged to transmit a first signal including at least one of a magnitude and polarity of a first current through the low-side power switch, and a first driver circuit arranged to transmit a first control signal to the low-side power switch based at least in part on a voltage at the switch node and the first signal.

4 . The circuit of claim 3 , wherein the first driver circuit comprises a first threshold generation circuit.

5 . The circuit of claim 1 , wherein the low-side power switch is a gallium nitride (GaN) based switch.

6 . The circuit of claim 1 , wherein the high-side power switch is a gallium nitride (GaN) based switch.

7 . A method of operating a circuit, the method comprising:

providing an input terminal and a ground terminal coupled to a power supply;

providing an output terminal and the ground terminal coupled to a load;

providing a low-side circuit comprising a low-side power switch coupled between a switch node and the ground terminal;

providing a high-side circuit comprising a high-side power switch coupled between the switch node and the output terminal;

providing an inductor coupled between the switch node and the input terminal;

detecting, by a controller, a valley of a voltage at the switch node;

transmitting a signal, by the low-side circuit, to the high-side circuit in response to the controller detecting the valley;

turning on, by the high-side circuit, the high-side power switch for a time interval sufficient to generate a negative current in the inductor in response to receiving the signal or in response to receiving the signal and a drain-to-source voltage of the high-side power switch going to zero;

turning off, by the high-side circuit, the high-side power switch causing the voltage at the switch node goes to zero volt; and

turning on, by the low-side circuit, the low-side power switch in response to the voltage at the switch node being at zero volt.

8 . The method of claim 7 , wherein the high-side circuit determines the time interval sufficient to generate a negative current in the inductor based on a duty cycle of a pulse width modulated (PWM) signal received from the controller, and a value of a resistor.

9 . The method of claim 7 , wherein the low-side circuit further comprises a first current sense device arranged to transmit a first signal including at least one of a magnitude and polarity of a first current through the low-side power switch, and a first driver circuit arranged to transmit first control signals to the low-side power switch based at least in part on a voltage at the switch node and the first signal.

10 . The method of claim 9 , wherein the first driver circuit comprises a first threshold generation circuit.

11 . A method of operating a circuit, the method comprising:

providing an input terminal and a ground terminal coupled to a power supply;

providing an output terminal and the ground terminal coupled to a load;

providing a low-side circuit comprising a low-side power switch coupled between a switch node and the ground terminal;

providing a high-side circuit comprising a high-side power switch coupled between the switch node and the output terminal;

providing an inductor coupled between the switch node and the input terminal;

detecting, by a controller, a valley of a voltage at the switch node;

transmitting a signal, by the low-side circuit, to the high-side circuit in response to the controller detecting the valley; and

turning on, by the high-side circuit, the high-side power switch for a time interval sufficient to generate a negative current in the inductor in response to receiving the signal.

12 . The method of claim 11 , further comprising turning off, by the high-side circuit, the high-side power switch causing the voltage at the switch node goes to zero volt.

13 . The method of claim 12 , further comprising turning on, by the low-side circuit, the low-side power switch in response to the voltage at the switch node being at zero volt.

14 . The method of claim 13 , further comprising determining, by the high-side circuit, the time interval sufficient to generate a negative current in the inductor based on a duty cycle of a pulse width modulated (PWM) signal received from the controller and a value of a resistor.

15 . The method of claim 14 , wherein the low-side circuit comprises a first current sense device.

16 . The method of claim 15 , further comprising transmitting, by the first current sense device, a first signal including at least one of a magnitude and polarity of a first current through the low-side power switch, and a first driver circuit arranged to transmit first control signals to the low-side power switch based at least in part on a voltage at the switch node and the first signal.

17 . The method of claim 16 , wherein the low-side circuit further comprises a first driver circuit.

18 . The method of claim 17 , further comprising transmitting, by the first driver circuit, a first control signal to the low-side power switch based at least in part on a voltage at the switch node and the first signal.

19 . The method of claim 11 , wherein the low-side power switch is a gallium nitride (GaN) based switch.

20 . The method of claim 11 , wherein the high-side power switch is a gallium nitride (GaN) based switch.