IP Library Granted Patent US 12689331
Granted Patent B2
US 12689331 · App. 18/444,412 · Granted Jul 21, 2026

Electronic circuit linearization method

Inventors: Daniel R. Mohr (Allentown, NJ); Burton E. Sarnoff (Aspers, PA)
H03F1/3211H03F1/302H03F3/45085
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Quick Facts
Patent No.
US 12689331
App. No.
18/444,412
Granted
Jul 21, 2026
Kind
B2
Abstract

The invention concerns an electronic circuit which corrects for non-linearities present in transistor devices. The inventive circuit allows for the construction of amplifiers that are inherently low in distortion, eliminating the requirement for the use of feedback to linearize the amplifier. The invention is particularly useful for driving audio amplifiers, but can be used with other audio devices and amplifiers. The circuit has an input transistor connected in tandem with a second transistor. The transistor pair functions as a unit to cancel the log varying base-emitter resistance of the input transistor, while also canceling the base-emitter temperature drift of the input transistor.

Claims (18)

1 . A linearization circuit for transistor amplifiers comprising:

first and second transistors, said first and second transistors of like polarity and each of said transistors having a base, collector, and emitter; and base, collector, and emitter terminals;

the base terminal of said first transistor serving as an input, the first transistor having an output at its collector terminal, said first transistor emitter terminal coupled to the collector of the second transistor which functions as a current source near saturation, said second transistor connected via the emitter terminal to a voltage supply source through a resistor to provide a countervailing nonlinear current dependent collector-base Shockley resistance to the first transistor;

whereby gain response of the linearization circuit is linear relative to the input signal without using feedback.

2 . The circuit of claim 1 wherein said first and second transistors are both PNP transistors.

3 . The circuit of claim 1 wherein said first and second transistors are both NPN transistors.

4 . The circuit of claim 1 wherein said first transistor is subject to base emitter temperature drift, and said countervailing nonlinear current dependent collector-base Shockley resistance cancels said base emitter temperature drift.

5 . An electronic circuit comprising:

first and second transistors of like polarity, each of said transistors having a base, collector, and emitter; and base, collector, and emitter terminals;

the first and second transistors connected in tandem to establish a tandem input circuit, with the first transistor serving as an input device through its base terminal and having an output through its collector terminal with its emitter terminal coupled to the collector terminal of the second transistor, the second transistor functioning as a current source near saturation and connected via its emitter to a voltage supply source through a resistor to set a current, thus providing a countervailing nonlinear current dependent collector-base Shockley resistance to a nonlinear current dependent base-emitter of the first transistor, in accordance with Ebers-Moll transistor modeling;

wherein the tandem circuit produces a substantially linear gain response to the input signal without requiring use of any feedback mechanisms as well as providing temperature compensation.

6 . The circuit of claim 5 wherein said first and second transistors are both PNP transistors.

7 . The circuit of claim 5 wherein said first and second transistors are both NPN transistors.

8 . The circuit of claim 5 wherein said first transistor is subject to base emitter temperature drift, and said countervailing nonlinear current dependent collector-base Shockley resistance cancels said base emitter temperature drift.

9 . An electronic circuit comprising first and second transistors of complementary polarity each of said transistors having a base, collector, and emitter; and base, collector, and emitter terminals;

an input circuit with said first and second transistors connected in a parallel configuration with the first transistor serving as an input device through its base terminal and having an output through its collector terminal with its emitter terminal coupled to the collector terminal of the second transistor which functions as a near saturated current source when properly biased and connected via its emitter to a voltage supply source through a resistor to set a current thus providing a countervailing nonlinear current dependent collector-base Shockley resistance to the nonlinear current dependent base-emitter Shockley resistance of the first transistor, in accordance with Ebers-Moll transistor modeling, so as to produce a substantially linear gain response of the input circuit to the input signal and provide temperature compensation.

10 . An electronic circuit comprising an input circuit having two transistors of complementary polarity in a parallel configuration with bases tied together, each of said transistors having an emitter load and a collector load, with the emitter load of the first transistor as the second transistor's collector load providing a current sum so that current dependent varying Shockley resistance of the first transistor is counterbalanced by an inversely varying current dependent Shockley resistance in the second transistor, thus improving gain linearity of the input circuit.

11 . The circuit of claim 10 wherein said first transistor is subject to base emitter temperature drift, and said countervailing nonlinear current dependent collector-base Shockley resistance cancels said base emitter temperature drift.