IP Library Granted Patent US 12689355
Granted Patent B2
US 12689355 · App. 17/389,619 · Granted Jul 21, 2026

Bulk acoustic wave resonator with an integrated passive device fabricated using bump process

Inventors: Ting-Ta Yen (San Jose, CA); Yao Yu (San Jose, CA); Hassan Omar Ali (Murphy, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H03H9/542H03H9/02007H03H9/17H03H9/60
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Quick Facts
Patent No.
US 12689355
App. No.
17/389,619
Granted
Jul 21, 2026
Kind
B2
Abstract

A circuit includes a semiconductor substrate and an integrated passive device. The integrated passive device is on a surface of the semiconductor substrate. The integrated passive device is in a metal layer on the semiconductor substrate. The metal layer is at least tens of micrometers thick. The integrated passive device may be an inductor or a capacitor in some examples.

Claims (81)

1 . A circuit, comprising:

a semiconductor substrate;

an inductor over the semiconductor substrate;

a resonator on the semiconductor substrate, the resonator coupled in series with the inductor; and

a seal ring over the semiconductor substrate and at least partially surrounding the inductor, the seal ring and the inductor made of a same material.

2 . The circuit of claim 1 , wherein the resonator is a first resonator, and the circuit includes a second resonator coupled to the first resonator.

3 . The circuit of claim 2 , wherein the inductor is coupled between the first and second resonators.

4 . The circuit of claim 1 , wherein the inductor and the seal ring have a same thickness.

5 . The circuit of claim 1 , further comprising a second substrate coupled to the seal ring via solder.

6 . The circuit of claim 1 , further comprising:

a first I/O terminal over the semiconductor substrate; and

a second I/O terminal over the semiconductor substrate;

wherein:

the inductor includes:

a first terminal coupled to the first I/O terminal; and

a second terminal; and

the resonator includes:

a first terminal coupled to the second terminal of the inductor; and

a second terminal coupled to the second I/O terminal.

7 . The circuit of claim 1 , wherein the seal ring includes a copper post or a copper bump.

8 . The circuit of claim 1 , further comprising:

a first I/O terminal over the semiconductor substrate; and

a second I/O terminal over the semiconductor substrate; and

wherein:

the inductor includes:

a first terminal coupled to the first I/O terminal; and

a second terminal coupled to the second I/O terminal.

9 . The circuit of claim 1 , further comprising:

a first I/O terminal over the semiconductor substrate;

a second I/O terminal over the semiconductor substrate; and

a capacitor over the semiconductor substrate; and

wherein:

the inductor includes:

a first terminal coupled to the first I/O terminal; and

a second terminal coupled to the second I/O terminal and a terminal of the capacitor.

10 . The circuit of claim 9 , wherein:

the inductor is a first inductor; and

the circuit includes:

a second inductor over the semiconductor substrate; and

the second inductor includes:

a first terminal coupled to the first terminal of the first inductor; and

a second terminal coupled to the second I/O terminal.

11 . The circuit of claim 1 , wherein the resonator is a micro-electro-mechanical system (MEMS) resonator.

12 . The circuit of claim 11 , wherein the MEMS resonator is a bulk acoustic wave (BAW) resonator.

13 . The circuit of claim 1 , wherein the inductor is at least 30 micrometers thick.

14 . A circuit, comprising:

a semiconductor substrate;

a resonator over the semiconductor substrate;

an inductor over the semiconductor substrate, in which the inductor is coupled in series to the resonator; and

a seal ring over the semiconductor substrate, in which the seal ring at least partially laterally surrounds the inductor and the resonator.

15 . The circuit of claim 14 , further comprising a base die coupled to the seal ring, wherein the base die is spaced from the inductor.

16 . The circuit of claim 14 , further comprising:

a first I/O terminal over the semiconductor substrate; and

a second I/O terminal over the semiconductor substrate; and

wherein:

the inductor includes:

a first terminal coupled to the first I/O terminal; and

a second terminal coupled to the second I/O terminal.

17 . The circuit of claim 14 , further comprising:

a first I/O terminal over the semiconductor substrate; and

a second I/O terminal over the semiconductor substrate;

wherein:

the inductor includes:

a first terminal coupled to the first I/O terminal; and

a second terminal;

the resonator includes:

a first terminal coupled to the second terminal of the inductor; and

a second terminal coupled to the second I/O terminal.

18 . A circuit, comprising:

a first die including a semiconductor substrate;

a first I/O terminal over the semiconductor substrate;

a second I/O terminal over the semiconductor substrate;

a passive device over the semiconductor substrate and includes a terminal coupled to the first I/O terminal;

a seal ring that surrounds the passive device, the first I/O terminal, and the second I/O terminal, the seal ring having a same material as the passive device and the first and second I/O terminals; and

a second die coupled to first I/O terminal and to the second I/O terminal, in which at least part of the passive device is spaced from at least one of the first or second dies.

19 . The circuit of claim 18 , wherein the terminal of the passive device is a first terminal, the circuit further comprising:

a capacitor over the semiconductor substrate, and the capacitor includes a terminal coupled to the terminal of the passive device; and

wherein the passive device includes a second terminal coupled to the second I/O terminal.

20 . The circuit of claim 19 , wherein the passive device is a first inductor, the circuit further comprising a second inductor over the semiconductor substrate and wherein the second inductor includes:

a first terminal coupled to the first terminal of the first inductor; and

a second terminal coupled to the second I/O terminal.