Systems and methods for high-voltage-tolerant level shifters
The disclosed device for high-voltage-tolerant level shifters can include a level shifter device configured to shift an input signal from an input voltage range to an output voltage range, where a span from a bottom of the input voltage range to a top of the output voltage range is greater than a voltage differential tolerance of any of the plurality of transistors. Various other devices and systems are also disclosed.
1 . A level-shifter device comprising a plurality of transistors, wherein:
the level-shifter device is configured to shift an input signal from an input voltage range to an output voltage range,
a span from a bottom of the input voltage range to a top of the output voltage range is greater than a voltage differential tolerance of any of the plurality of transistors,
a top of the input voltage range corresponds to an input voltage domain,
the level-shifter device comprises a pair of input buffers coupled to the input signal-,
the level-shifter device comprises a pair of drain nets coupled respectively to the pair of input buffers, and
the pair of drain nets are configured to each remain at a respective voltage range spanning from the input voltage domain and the voltage differential tolerance.
2 . The level-shifter device of claim 1 , wherein the plurality of transistors comprises a pair of cross-coupled field-effect transistors, wherein the pair of drain nets of the pair of cross-coupled field-effect transistors comprise a pair of complementary output nets of the level-shifter device.
3 . The level-shifter device of claim 2 , wherein a voltage source of the pair of cross-coupled field-effect transistors provides a voltage level at the top of the output voltage range.
4 . The level-shifter device of claim 2 , wherein the plurality of transistors comprises a pair of driving field-effect transistors with high voltage thresholds that activate the pair of cross-coupled field-effect transistors.
5 . The level-shifter device of claim 4 , wherein a voltage source of the pair of driving field-effect transistors provides a voltage level at the bottom of the output voltage range.
6 . The level-shifter device of claim 4 , wherein the pair of input buffers each comprise a buffering field-effect transistor, wherein a source and a bulk of the buffering field-effect transistor connects to a corresponding drain net of a corresponding transistor of the pair of driving field-effect transistors.
7 . The level-shifter device of claim 1 , wherein:
the input voltage range is from a ground voltage level to a core voltage level; and
the output voltage range is from a core voltage level to an input/output voltage level.
8 . The level-shifter device of claim 7 , wherein:
the core voltage level is about 0.8 volts; and
the input/output voltage level is about 1.8 volts.
9 . The level-shifter device of claim 7 , wherein the voltage differential tolerance is about 1.5 volts.
10 . The level-shifter device of claim 1 , wherein none of the plurality of transistors experiences voltage stress greater than the voltage differential tolerance when the level-shifter device is in operation.
11 . A system comprising:
a level-shifter device comprising a plurality of transistors, wherein:
the level-shifter device is configured to shift an input signal from an input voltage range to an output voltage range,
a span from a bottom of the input voltage range to a top of the output voltage range is greater than a voltage differential tolerance of any of the plurality of transistors,
a top of the input voltage range corresponds to an input voltage domain,
the level-shifter device comprises a pair of input buffers coupled to the input signal,
the level-shifter device comprises a pair of drain nets coupled respectively to the pair of input buffers, and
the pair of drain nets are configured to each remain at a respective voltage range spanning from the input voltage domain and the voltage differential tolerance;
a first pre-driver and a second pre-driver that is complementary to the first pre-driver, wherein an output of the level-shifter device is an input to the first pre-driver and the input signal is an input to the second pre-driver; and
an output buffer circuit that receives outputs of the first and second pre-drivers as inputs and outputs a conditioned signal to an input/output pad.
12 . The system of claim 11 , wherein the plurality of transistors comprises a pair of cross-coupled field-effect transistors, wherein the pair of drain nets of the pair of cross-coupled field-effect transistors comprise a pair of complementary output nets of the level-shifter device.
13 . The system of claim 12 , wherein a voltage source of the pair of cross-coupled field-effect transistors provides a voltage level at the top of the output voltage range.
14 . The system of claim 12 , wherein the plurality of transistors comprises a pair of driving field-effect transistors that activate the pair of cross-coupled field-effect transistors.
15 . The system of claim 14 , wherein a voltage source of the pair of driving field-effect transistors provides a voltage level at the bottom of the output voltage range.
16 . The system of claim 14 , wherein the pair of input buffer stages each comprise a buffering field-effect transistor, wherein a source and a bulk of the buffering field-effect transistor connects to a corresponding drain net of a corresponding transistor of the pair of driving field-effect transistors.
17 . The system of claim 11 , wherein:
the input voltage range is from a ground voltage level to a core voltage level; and
the output voltage range is from a core voltage level to an input/output voltage level.
18 . The system of claim 17 , wherein:
the core voltage level is about 0.8 volts; and
the input/output voltage level is about 1.8 volts.
19 . The system of claim 17 , wherein the voltage differential tolerance is about 1.5 volts.
20 . A method of manufacture, comprising disposing a plurality of transistors to form a level-shifter device that is configured to shift an input signal from an input voltage range to an output voltage range, wherein:
a span from a bottom of the input voltage range to a top of the output voltage range is greater than a voltage differential tolerance of any of the plurality of transistors,
a top of the input voltage range corresponds to an input voltage domain,
the level-shifter device further comprises a pair of input buffers coupled to the input signal,
the level-shifter device comprises a pair of drain nets coupled respectively to the pair of input buffers, and
the pair of drain nets are configured to each remain at a respective voltage range spanning from the input voltage domain and the voltage differential tolerance.