IP Library › Granted Patent US 12,689,386
Granted Patent B2
US 12,689,386 · App. 18/918,271 · Granted Jul 21, 2026

TI ADC time skew background calibration using the complex derivative signal

Inventors: Maarten Jelmar Molendijk (Eindhoven, NL); Robert van Veldhoven (Valkenswaard, NL)
Assignee: NXP B.V.
H03M1/0626H03M1/0836H03M1/1014
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Quick Facts
Patent No.
US 12,689,386
App. No.
18/918,271
Granted
Jul 21, 2026
Kind
B2
Abstract

Disclosed is a circuit including timer interleaved (TI) analog-to-digital converter (ADC) circuitry which generates digital output signals. Correction circuitry receives the digital output signals from the TI ADC circuitry and generates corrected output signals using weight values to correct time skew. The correction circuitry includes a derivative filter which removes frequency dependency between the weight values and input signals to the TI ADC circuitry. Weight updating circuitry receives the corrected output signals and generates updated weight values for the correction circuitry. The weight updating circuitry includes a notch filter which suppresses spectral content in the corrected output signals to cancel spurious correlations in the weight updating process.

Claims (52)

1 . A circuit comprising:

time-interleaved (TI) analog-to-digital converter (ADC) circuitry configured to receive input signals and to responsively generate digital output signals;

correction circuitry configured to receive the digital output signals from the TI ADC circuitry and to responsively generate a corrected output signal using weight values, the correction circuitry including a first derivative filter; and

weight updating circuitry configured to receive the corrected output signal and to responsively generate updated weight values, the weight updating circuitry including a notch filter configured to filter the corrected output signal to generate filtered corrected output signals, the weight updating circuitry further configured to generate the updated weight values using the filtered corrected output signals.

2 . The circuit of claim 1 , wherein the first derivative filter is a finite impulse response (FIR) derivative filter configured to remove frequency dependency between the input signals and calibrated coefficients used in the correction circuitry.

3 . The circuit of claim 1 , wherein the weight updating circuitry is configured to provide the updated weight values to the correction circuitry to replace the weight values, and wherein the correction circuitry is configured to use the updated weight values to generate the corrected output signal.

4 . The circuit of claim 1 , wherein the TI ADC circuitry provides the digital output signals as sequentially generated outputs of ‘M’ ADC channels.

5 . The circuit of claim 1 , wherein the correction circuitry further comprises:

a first Hilbert filter configured to receive the derivative of the digital output signals and to responsively generate a Hilbert transform of the derivative of the digital output signals;

a first delay circuit configured to receive the derivative of the digital output signals and to provide a delayed derivative of the digital output signals; and

a first mixer circuit coupled to the first Hilbert filter and to the first delay circuit, the first mixer circuit configured to generate first complex signals by mixing the Hilbert transform of the derivative of the digital output signals and the delayed derivative of the digital output signals with sinusoids.

6 . The circuit of claim 5 , wherein the first mixer circuit is configured to generate the first complex signals by mixing the Hilbert transform of the derivative of the digital output signals and the delayed derivative of the digital output signals with sinusoids at integer multiples of f s /M, where f s is a sampling frequency and M is a time-interleaving factor.

7 . The circuit of claim 5 , wherein the first mixer circuit is configured to generate the first complex signals such that input tones of the first complex signals are mixed up to a frequency of a time skew spur location.

8 . The circuit of claim 7 , wherein the first mixer circuit comprises M-1 parallel first mixer circuits each configured to apply M-1 mixing functions to mix the Hilbert transform of the derivative of the digital output signals and the delayed derivative of the digital output signals.

9 . The circuit of claim 5 , wherein the weight values are complex weight values, and wherein the correction circuitry further comprises:

a first product circuit configured to multiply the first complex signals by the complex weight values to produce first weighted complex signals;

a subtraction circuit configured to subtract the first weighted complex signals from the digital output signals to produce the corrected output signal.

10 . The circuit of claim 1 , wherein the notch filter of the weight updating circuitry is configured to suppress any input tones from the corrected output signal around integer multiples of f s /M in the filtered corrected output signals.

11 . The circuit of claim 5 , wherein the weight updating circuitry further comprises:

a second derivative filter configured to generate a derivative of the filtered corrected output signals;

a second Hilbert filter configured to receive the derivative of the filtered corrected output signals and to responsively generate a Hilbert transform of the derivative of the filtered corrected output signals;

a second delay circuit configured to receive the derivative of the filtered corrected output signals and to provide a delayed derivative of the filtered corrected output signals; and

a second mixer circuit coupled to the second Hilbert filter and to the second delay circuit, the second mixer circuit configured to generate second complex signals by mixing the Hilbert transform of the derivative of the filtered corrected output signals and the delayed derivative of the filtered corrected output signals with sinusoids at integer multiples of f s /M.

12 . The circuit of claim 11 , wherein the weight updating circuitry further comprises:

a third delay circuit configured to receive the filtered corrected output signals and to provide delayed filtered corrected output signals; and

a second product circuit configured to produce cross-correlation between the second complex signals and the delayed filtered corrected output signals, wherein the weight updating circuitry is further configured to generate the updated weight values as a function of the cross-correlation.

13 . The circuit of claim 12 , wherein the weight updating circuitry further comprises:

a third product circuit configured to scale the cross-correlation by a learning rate factor to produce a scaled cross-correlation; and

an addition circuit configured to add the scaled cross-correlation to the weight values to produce the updated weight values.

14 . A circuit comprising:

time-interleaved (TI) analog-to-digital converter (ADC) circuitry configured to receive input signals and to responsively generate digital output signals, the TI ADC circuitry providing sequentially generated outputs of ‘M’ ADC channels, where f s is a sampling frequency;

correction circuitry configured to receive the digital output signals from the TI ADC circuitry and to responsively generate a corrected output signal using complex weight values, the correction circuitry including a first derivative filter configured to generate a derivative of the digital output signals, wherein the corrected output signal is generated based upon the derivative of the digital output signals; and

weight updating circuitry configured to receive the corrected output signal and to responsively generate updated complex weight values to replace the complex weight values for use by the correction circuitry.

15 . The circuit of claim 14 , wherein the weight updating circuitry includes a notch filter configured to filter the corrected output signal to suppress spectral content in the corrected output signals, at frequencies where time-interleaving spurs occur, to generate filtered corrected output signals, the weight updating circuitry further configured to generate the updated complex weight values using the filtered corrected output signals.

16 . The circuit of claim 15 , wherein the correction circuitry further comprises:

a first Hilbert filter configured to receive the derivative of the digital output signals and to responsively generate a Hilbert transform of the derivative of the digital output signals, wherein the first Hilbert filter has a unity gain and a constant phase shift of +90 or −90 degrees;

a first delay circuit configured to receive the derivative of the digital output signals and to provide a delayed derivative of the digital output signals; and

a first mixer circuit coupled to the first Hilbert filter and to the first delay circuit, the first mixer circuit configured to generate first complex signals by mixing the Hilbert transform of the derivative of the digital output signals and the delayed derivative of the digital output signals with sinusoids at integer multiples of f s /M.

17 . The circuit of claim 16 , wherein the first mixer circuit is configured to generate the first complex signals such that input tones of the first complex signals are mixed up to the frequencies where time-interleaving spurs occur.

18 . The circuit of claim 17 , wherein the correction circuitry further comprises:

a first product circuit configured to multiply the first complex signals by the complex weight values to produce first weighted complex signals;

a subtraction circuit configured to subtract the first weighted complex signals from the digital output signals to produce the corrected output signal.

19 . The circuit of claim 15 , wherein the notch filter of the weight updating circuitry is configured to suppress any input tones from the corrected output signal around integer multiples of f s /M.

20 . The circuit of claim 15 , wherein the weight updating circuitry further comprises:

a second derivative filter configured to generate a derivative of the filtered corrected output signals;

a second Hilbert filter configured to receive the derivative of the filtered corrected output signals and to responsively generate a Hilbert transform of the derivative of the filtered corrected output signals;

a second delay circuit configured to receive the derivative of the filtered corrected output signals and to provide a delayed derivative of the filtered corrected output signals;

a second mixer circuit coupled to the second Hilbert filter and to the second delay circuit, the second mixer circuit configured to generate second complex signals by mixing the Hilbert transform of the derivative of the filtered corrected output signals and the delayed derivative of the filtered corrected output signals with sinusoids at integer multiples of f s /M;

a third delay circuit configured to receive the filtered corrected output signals and to provide delayed filtered corrected output signals;

a second product circuit configured to produce cross-correlation between the second complex signals and the delayed filtered corrected output signals;

a third product circuit configured to scale the cross-correlation by a learning rate factor to produce a scaled cross-correlation; and

an addition circuit configured to add the scaled cross-correlation to the weight values to produce the updated weight values.