Methods and apparatuses for mapping from VRB to PRB

Inventors: Lingling Xiao (Beijing, CN); Bingchao Liu (Beijing, CN); Chenxi Zhu (Fairfax, VA); Wei Ling (Beijing, CN); Yi Zhang (Beijing, CN)

Assignee: Lenovo (Beijing) Limited

H04L5/0053 H04L5/0044 H04W72/1273

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Quick Facts

Patent No.: US 12689488
App. No.: 18/693,457
Granted: Jul 21, 2026
Kind: B2

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Abstract

Embodiments of the present disclosure relate to methods and apparatuses for mapping from virtual resource block (VRB) to physical resource block (PRB) of a physical downlink shared channel (PDSCH) transmission. According to an embodiment of the present disclosure, a user equipment can include: a receiver that receives a downlink control information (DCI) format 1_0 in two or more linked common search spaces (CSSs) associated with two or more control resource sets (CORESETs), wherein each CSS of the two or more linked CSSs is associated with a CORESET of the two or more CORESETs; and a processor that is coupled to the receiver and determines a lowest-numbered PRB in the two or more CORESETs for mapping from VRB to PRB of a PDSCH transmission scheduled by the DCI format 1_0.

Claims (33)

1 . A user equipment (UE) for wireless communication, comprising:

at least one memory; and

at least one processor coupled with the at least one memory and configured to cause the UE to:

receive a downlink control information (DCI) format 1_0 in two or more linked common search spaces (CSSs) associated with two or more control resource sets (CORESETs), wherein each CSS of the two or more linked CSSs is associated with a CORESET of the two or more CORESETs; and

determine a lowest-numbered physical resource block (PRB) in the two or more CORESETs for mapping from virtual resource block (VRB) to PRB of a physical downlink shared channel (PDSCH) transmission scheduled by the DCI format 1_0.

2 . The UE of claim 1 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET with a lowest CORESET identity (ID) among the two or more CORESETs.

3 . The UE of claim 1 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a CSS with a lowest CSS ID or a highest CSS ID among the two or more linked CSSs.

4 . The UE of claim 1 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a lowest lowest-numbered PRB or a highest lowest-numbered PRB in the two or more CORESETs.

5 . The UE of claim 1 , wherein the at least one processor is further configured to cause the UE to receive configuration information configuring a CSS set containing the two or more linked CSSs, and wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a first CSS or a last CSS in the CSS set.

6 . The UE of claim 1 , wherein the at least one processor is further configured to cause the UE to receive configuration information of one CSS of the two or more linked CSSs which contains CSS ID(s) of other CSS(s) of the two or more linked CSSs, and wherein the lowest-numbered PRB is a lowest-numbered PRB in the one CORESET is a CORESET associated with the one CSS.

7 . The UE of claim 1 , wherein the lowest-numbered PRB is a lowest-numbered PRB in is a CORESET associated with a reference physical downlink control channel (PDCCH) candidate, wherein the reference PDCCH candidate is a PDCCH candidate where the DCI format 1_0 is received and having a latest end symbol or an earliest start symbol in time domain.

8 . The UE of claim 1 , wherein the at least one processor is further configured to cause the UE to receive configuration information configuring a same lowest-numbered PRB for all of the two or more CORESETs, and wherein the lowest-numbered PRB is the same lowest-numbered PRB.

9 . A base station (BS) for wireless communication, comprising:

at least one memory; and

at least one processor coupled with the at least one memory and configured to cause the BS to:

transmit a downlink control information (DCI) format 1_0 in two or more linked common search spaces (CSSs) associated with two or more control resource sets (CORESETs) for scheduling a physical downlink shared channel (PDSCH) transmission, wherein each CSS of the two or more linked CSSs is associated with a CORESET of the two or more CORESETs; and

a determine a lowest-numbered physical resource block (PRB) in the two or more CORESETs for mapping from virtual resource block (VRB) to PRB of the PDSCH transmission scheduled by the DCI format 1_0.

10 . A method performed by a user equipment (UE), the method comprising:

receiving a downlink control information (DCI) format 1_0 in two or more linked common search spaces (CSSs) associated with two or more control resource sets (CORESETs), wherein each CSS of the two or more linked CSSs is associated with a CORESET of the two or more CORESETs; and

determining a lowest-numbered physical resource block (PRB) in the two or more CORESETs for mapping from virtual resource block (VRB) to PRB of a physical downlink shared channel (PDSCH) transmission scheduled by the DCI format 1_0.

11 . The method of claim 10 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET with a lowest CORESET identity (ID) among the two or more CORESETs.

12 . The method of claim 10 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a CSS with a lowest CSS ID or a highest CSS ID among the two or more linked CSSs.

13 . The BS of claim 9 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET with a lowest CORESET identity (ID) among the two or more CORESETs.

14 . A processor for wireless communication, comprising:

at least one controller coupled with at least one memory and configured to cause the processor to:

15 . The processor of claim 14 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET with a lowest CORESET identity (ID) among the two or more CORESETs.

16 . The processor of claim 14 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a CSS with a lowest CSS ID or a highest CSS ID among the two or more linked CSSs.

17 . The processor of claim 14 , wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a lowest lowest-numbered PRB or a highest lowest-numbered PRB in the two or more CORESETs.

18 . The processor of claim 14 , wherein the at least one controller is further configured to cause the processor to receive configuration information configuring a CSS set containing the two or more linked CSSs, and wherein the lowest-numbered PRB is a lowest-numbered PRB in a CORESET associated with a first CSS or a last CSS in the CSS set.

19 . The processor of claim 14 , wherein the at least one controller is further configured to cause the processor to receive configuration information of one CSS of the two or more linked CSSs which contains CSS ID(s) of other CSS(s) of the two or more linked CSSs, and wherein the lowest-numbered PRB is a lowest-numbered PRB in the one CORESET is a CORESET associated with the one CSS.

20 . The processor of claim 14 , wherein the at least one controller is further configured to cause the processor to receive configuration information configuring a same lowest-numbered PRB for all of the two or more CORESETs, and wherein the lowest-numbered PRB is the same lowest-numbered PRB.