Image sensor and electronic device
The present technology relates to an image sensor and an electronic device that can reduce an FD capacity. An image sensor includes a substrate, a first pixel including a first photoelectric conversion area provided in the substrate, a second pixel including a second photoelectric conversion area adjacent to the first photoelectric conversion area and provided in the substrate, a trench provided in the substrate between the first photoelectric conversion area and the second photoelectric conversion area, a first area included in the first pixel, a second area included in the second pixel, and a third area in contact with the first area, the second area, and the trench. The present technology can be applied to, for example, a CMOS image sensor.
1 . An image sensor, comprising:
a substrate;
a first pixel including a first photoelectric conversion area provided in the substrate;
a second pixel including a second photoelectric conversion area adjacent to the first photoelectric conversion area and provided in the substrate;
a trench provided in the substrate between the first photoelectric conversion area and the second photoelectric conversion area;
a first area included in the first pixel;
a second area included in the second pixel; and
a third area in contact with the first area, the second area, and the trench,
wherein two side surfaces and a bottom surface of the third area are in contact with and extend within a predetermined film formed in the trench,
wherein the first area and the second area are in contact with two other side surfaces of the third area,
wherein the first area and the second area are floating diffusions (FDs),
wherein the third area is formed of polysilicon containing N-type or P-type impurities with respect to the substrate, and
wherein the predetermined film includes a silicon dioxide film.
2 . The image sensor according to claim 1 , wherein the first area, the second area, and the third area are N-type impurity areas or P-type impurity areas.
3 . The image sensor according to claim 1 , wherein the first area, the second area, and the third area are areas configured to be biased at the same potential.
4 . The image sensor according to claim 1 , wherein the first area and the second area are ground areas.
5 . The image sensor according to claim 1 , wherein the two side surfaces and the bottom surface of the third area form an arc shape.
6 . The image sensor according to claim 1 , wherein a wiring connected to a transistor is connected to the third area.
7 . The image sensor according to claim 1 , wherein a depth of the third area is 50% to 80% of a depth of the first area.
8 . The image sensor according to claim 1 , wherein the first area is formed to have the same size as or to be larger than the third area in a portion in which the first area and the third area are in contact with each other.
9 . The image sensor according to claim 1 , wherein the third area is in contact with the first area on two sides.
10 . The image sensor according to claim 1 ,
wherein a wiring connected to a transistor is connected to the first area, and
wherein the first area is formed as an area larger than the second area.
11 . The image sensor according to claim 1 , wherein a PN junction area including a P-type area and an N-type area is formed on a sidewall of the trench.
12 . An electronic device, comprising:
an optical system;
an image sensor that receives light from the optical system, the image sensor including:
a substrate;
a first pixel including a first photoelectric conversion area provided in the substrate;
a second pixel including a second photoelectric conversion area adjacent to the first photoelectric conversion area and provided in the substrate;
a trench provided in the substrate between the first photoelectric conversion area and the second photoelectric conversion area;
a first area included in the first pixel;
a second area included in the second pixel; and
a third area in contact with the first area, the second area, and the trench,
wherein two side surfaces and a bottom surface of the third area are in contact with and extend within a predetermined film formed in the trench,
wherein the first area and the second area are in contact with two other side surfaces of the third area,
wherein the first area and the second area are floating diffusions (FDs), wherein the third area is formed of polysilicon containing N-type or P-type impurities with respect to the substrate, and
wherein the predetermined film includes a silicon dioxide film; and
a digital signal processor that possesses signal received from the image sensor.
13 . The electronic device according to claim 12 , wherein the first area, the second area, and the third area are N-type impurity areas or P-type impurity areas.
14 . The electronic device according to claim 12 , wherein the first area, the second area, and the third area are areas configured to be biased at the same potential.
15 . The electronic device according to claim 12 , wherein the first area and the second area are ground areas.
16 . The electronic device according to claim 12 , wherein the two side surfaces and the bottom surface of the third area form an arc shape.