Dynamic flash memory (DFM) with channel first scheme
A three-dimensional (3D) memory device includes a memory cell, a top contact coupled to the memory cell, and a bottom contact coupled to the memory cell. The memory cell can include a pillar, an insulating layer surrounding the pillar, a first gate contact surrounding a first portion of the insulating layer, and a second gate contact surrounding a second portion of the insulating layer. The pillar can be configured to store an electrical charge. The pillar can be a monocrystalline material. The 3D memory device can utilize dynamic flash memory (DFM), decrease defects, increase manufacturing efficiency, decrease leakage current, decrease junction current, decrease power consumption, increase storage density, increase charge retention times, and decrease refresh rates.
1 . A three-dimensional memory device comprising:
a memory cell comprising:
a pillar configured to store an electrical charge, the pillar being a monocrystalline material;
a monolithic insulating layer surrounding the pillar;
a first gate contact surrounding a first portion of the monolithic insulating layer, the first gate contact coupled to a word line configured to address and non-destructively read the pillar; and
a second gate contact surrounding a second portion of the monolithic insulating layer, the second gate contact coupled to a plate line configured to program the pillar and separated from the first gate contact by the monolithic insulating layer;
a top contact coupled to the memory cell, the top contact coupled to a bit line configured to flow electrical charge through the memory cell; and
a bottom contact coupled to the memory cell, the bottom contact coupled to a source line configured to flow electrical charge through the memory cell and separated from the second gate contact by the monolithic insulating layer.
2 . The three-dimensional memory device of claim 1 , wherein a defect concentration in the pillar is decreased in comparison to another pillar that is not monocrystalline.
3 . The three-dimensional memory device of claim 1 , wherein a leakage current in the pillar is decreased in comparison to another pillar that is not monocrystalline.
4 . The three-dimensional memory device of claim 1 , wherein a retention capacity for storing an electrical charge in the pillar is greater than about 100 ms.
5 . The three-dimensional memory device of claim 1 , wherein the three-dimensional memory device comprises a dynamic flash memory (DFM) device.
6 . The three-dimensional memory device of claim 1 , wherein the three-dimensional memory device is capacitor-free.
7 . A method of forming a three-dimensional memory device comprising:
forming a memory cell by:
forming a pillar configured to store an electrical charge, the pillar being formed of a monocrystalline material;
forming a monolithic insulating layer surrounding the pillar;
forming a first gate contact surrounding a first portion of the monolithic insulating layer, the first gate contact coupled to a word line configured to address and non-destructively read the pillar and separated from the first gate contact by the monolithic insulating layer; and
forming a second gate contact surrounding a second portion of the monolithic insulating layer, the second gate contact coupled to a plate line configured to program the pillar;
forming a top contact coupled to the memory cell and to a bit line configured to flow electrical charge through the memory cell; and
forming a bottom contact coupled to the memory cell and to a source line configured to flow electrical charge through the memory cell and separated from the second gate contact by the monolithic insulating layer.
8 . The method of claim 7 , wherein a defect concentration in the pillar is decreased in comparison to another pillar that is not monocrystalline.
9 . The method of claim 7 , wherein a leakage current in the pillar is decreased in comparison to another pillar that is not monocrystalline.
10 . The method of claim 7 , wherein a retention capacity for storing an electrical charge in the pillar is greater than about 100 ms.
11 . The method of claim 7 , wherein the three-dimensional memory device comprises a dynamic flash memory (DFM) device.
12 . The method of claim 7 , wherein the three-dimensional memory device is capacitor-free.