Heterojunction bipolar transistors including an intrinsic base with an asymmetrical dopant depth profile
Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises a first semiconductor layer including a first portion, a second portion, and a third portion between the first portion and the second portion, a first terminal including a first semiconductor region on the first portion of the first semiconductor layer, a second terminal including a second semiconductor region on the second portion of the first semiconductor layer, an intrinsic base laterally disposed between the first terminal and the second terminal, and an extrinsic base on the intrinsic base. The intrinsic base includes a doped region in the third portion of the first semiconductor layer, and the doped region has a dopant depth profile with a dopant concentration that is asymmetrical relative to the first terminal and the second terminal.
1 . A structure for a heterojunction bipolar transistor, the structure comprising:
a first semiconductor layer including a first portion, a second portion, and a third portion between the first portion and the second portion;
a first terminal including a first semiconductor region on the first portion of the first semiconductor layer;
a second terminal including a second semiconductor region on the second portion of the first semiconductor layer;
an intrinsic base laterally disposed between the first terminal and the second terminal, the intrinsic base including a second semiconductor layer and a first doped region in the third portion of the first semiconductor layer, the first doped region having a dopant depth profile with a first dopant concentration that is asymmetric between the first semiconductor region and the second semiconductor region, and; and
an extrinsic base on the intrinsic base,
wherein the second semiconductor layer is positioned between the extrinsic base and the third portion of the first semiconductor layer, and the second semiconductor layer has a thickness that varies as a function of position between the first semiconductor region and the second semiconductor region.
2 . The structure of claim 1 wherein the second semiconductor layer comprises silicon-germanium.
3 . The structure of claim 1 wherein the second semiconductor layer has a maximum thickness adjacent to the first semiconductor region and a minimum thickness adjacent to the second semiconductor region.
4 . The structure of claim 3 wherein the first terminal is a collector of the heterojunction bipolar transistor, and the second terminal is an emitter of the heterojunction bipolar transistor.
5 . The structure of claim 1 wherein the second semiconductor layer has a thickness that increases with increasing distance from the first semiconductor region.
6 . The structure of claim 1 further comprising:
a first dielectric spacer disposed between the first semiconductor region and the second semiconductor layer; and
a second dielectric spacer disposed between the second semiconductor region and the second semiconductor layer,
wherein the second semiconductor layer is laterally disposed between the first dielectric spacer and the second dielectric spacer.
7 . The structure of claim 6 wherein the extrinsic base is laterally disposed between the first dielectric spacer and the second dielectric spacer.
8 . The structure of claim 1 wherein the first terminal includes a first doped region in the first portion of the first semiconductor layer, the second terminal includes a doped region in the second portion of the first semiconductor layer, and the first doped region of the intrinsic base is laterally disposed between the first doped region of the first terminal and the doped region of the second terminal.
9 . The structure of claim 8 wherein the first terminal includes a second doped region in the third portion of the first semiconductor layer, the second doped region of the first terminal has the same conductivity type as the first doped region of the first terminal, and the second doped region of the first terminal is adjacent to the first doped region of the intrinsic base.
10 . The structure of claim 8 wherein the intrinsic base includes a second doped region in the third portion of the first semiconductor layer, the second doped region of the intrinsic base is adjacent to the first doped region of the intrinsic base, the first doped region of the intrinsic base and the second doped region of the intrinsic base have the same conductivity type, and the second doped region of the intrinsic base has a lower dopant concentration than the first doped region of the intrinsic base.
11 . The structure of claim 1 wherein the dopant depth profile of the first doped region of the intrinsic base has a depth in the third portion of the first semiconductor layer that increases with increasing distance from the first semiconductor region.
12 . The structure of claim 1 wherein the dopant depth profile of the first doped region of the intrinsic base has a depth in the third portion of the first semiconductor layer that varies as a function of position between the first semiconductor region and the second semiconductor region.
13 . The structure of claim 1 wherein the dopant depth profile of the first doped region of the intrinsic base has a minimum depth in the third portion of the first semiconductor layer adjacent to the first terminal, and the dopant depth profile of the first doped region of the intrinsic base has a maximum depth in the third portion of the first semiconductor layer adjacent to the second terminal.
14 . The structure of claim 13 wherein the second semiconductor layer has a maximum thickness adjacent to the first semiconductor region, and the second semiconductor layer has a minimum thickness adjacent to the second semiconductor region.
15 . The structure of claim 14 wherein the second semiconductor layer comprises silicon-germanium.
16 . The structure of claim 13 wherein the first terminal is a collector of the heterojunction bipolar transistor, and the second terminal is an emitter of the heterojunction bipolar transistor.
17 . The structure of claim 13 wherein the first terminal includes a doped region in the first portion of the first semiconductor layer, the second terminal includes a doped region in the second portion of the first semiconductor layer, and the first doped region of the intrinsic base is laterally disposed between the doped region of the first terminal and the doped region of the second terminal.
18 . A method of forming a structure for a heterojunction bipolar transistor, the method comprising:
forming a first terminal including a first semiconductor region on a first portion of a first semiconductor layer;
forming a second terminal including a second semiconductor region on a second portion of the first semiconductor layer;
forming an intrinsic base laterally disposed between the first terminal and the second terminal; and
forming an extrinsic base on the intrinsic base,
wherein the first semiconductor layer includes a third portion disposed between the first portion of the first semiconductor layer and the second portion of the first semiconductor layer, the intrinsic base includes a second semiconductor layer and a doped region in the third portion of the first semiconductor layer, the doped region has a dopant depth profile with a dopant concentration that is asymmetric between the first semiconductor region and the second semiconductor region, the second semiconductor layer is positioned between the extrinsic base and the third portion of the first semiconductor layer, and the second semiconductor layer has a thickness that varies as a function of position between the first semiconductor region and the second semiconductor region.
19 . The structure of claim 2 wherein the second semiconductor layer and the first doped region include a p-type dopant.
20 . The structure of claim 15 wherein the second semiconductor layer and the first doped region include a p-type dopant.