Semiconductor device with a monocrystalline extrinsic base and method therefor
A semiconductor device includes a semiconductor substrate, a collector region formed within the semiconductor substrate in a first semiconductor region having an upper surface and a collector sidewall, a base region disposed over the collector region, a seed region formed over the semiconductor substrate and coupled to the semiconductor substrate outside the base region, an extrinsic base region having an upper surface and formed over the seed region and electrically coupled to the base region, and an emitter region formed over the base region.
1 . A semiconductor device comprising:
a semiconductor substrate;
a collector region formed within the semiconductor substrate in a first semiconductor region, having an upper surface and a collector sidewall;
a base region, disposed over the collector region;
a seed region formed over the semiconductor substrate and coupled to the semiconductor substrate outside the base region, wherein a proximal portion of the seed region directly contacts an upper surface of a monocrystalline portion of the semiconductor substrate, wherein the proximal portion of the seed region in contact with the semiconductor substrate has a first length and a distal portion of the seed region directly over the proximal portion has a second length, wherein the first length is less than the second length;
a dielectric region formed over at least a portion of the first semiconductor region and over a portion the collector sidewall, wherein a portion of the dielectric region separates the base region from the seed region;
an extrinsic base region having an upper surface and formed over and coupled to the distal portion of the seed region and electrically coupled to the base region; and
an emitter region formed over the base region.
2 . The semiconductor device of claim 1 , wherein at least a portion of the extrinsic base region includes a monocrystalline material.
3 . The semiconductor device of claim 2 , wherein at least a portion of the extrinsic base region includes silicon germanium.
4 . The semiconductor device of claim 1 , wherein the seed region is formed in the first semiconductor region.
5 . The semiconductor device of claim 1 , wherein the proximal portion of the seed region in contact with the semiconductor substrate has a first length and a distal portion of the seed region directly over the proximal portion has a second length, and wherein the first length is more than ten percent larger than the second length.
6 . The semiconductor device of claim 1 , wherein the proximal portion of the seed region in contact with the semiconductor substrate has a first length and a distal portion of the seed region directly over the proximal portion has a second length, and wherein a magnitude of a difference between the first length and the second length is less than ten percent of the first length.
7 . The semiconductor device of claim 1 , wherein a sidewall of the seed region is coupled to the base region in a base-seed coupling region.
8 . The semiconductor device of claim 1 , wherein the seed region is formed in a second semiconductor region, and wherein a second isolation region is formed between the collector sidewall and the second semiconductor region.
9 . The semiconductor device of claim 1 , wherein the dielectric region includes a plurality of dielectric layers.
10 . The semiconductor device of claim 1 , further comprising a lateral link region formed between the extrinsic base region and the base region, wherein the lateral link region includes a base link portion that is coupled to a sidewall of the extrinsic base region and to a portion of the base region.
11 . The semiconductor device of claim 9 , further comprising an opening formed between the extrinsic base region and the seed region.
12 . A bipolar transistor device comprising:
a semiconductor substrate;
a first isolation region formed within the semiconductor substrate;
a collector region formed laterally adjacent the first isolation region within the semiconductor substrate in a first semiconductor region, having an upper surface and a collector sidewall;
a base region disposed over the collector region;
a dielectric region formed over at least a portion of the semiconductor substrate and over the collector sidewall;
a seed region formed over the semiconductor substrate within a seed opening in the dielectric region and coupled to the semiconductor substrate outside the base region, wherein a proximal portion of the seed region directly contacts an upper surface of a monocrystalline portion of the semiconductor substrate, wherein the proximal portion of the seed region in contact with the semiconductor substrate has a first length and a distal portion of the seed region directly over the proximal portion has a second length, wherein the first length is less than the second length,
wherein a portion of the dielectric region separates the base region from the seed region;
an extrinsic base region formed over the seed region, the extrinsic base region having a first portion formed between and laterally adjacent the distal portion of the seed region and the base region, wherein at least a portion of the extrinsic base region is monocrystalline and wherein a monocrystalline portion of the extrinsic base is electrically coupled to the base region; and
an emitter region formed over the base region.
13 . The bipolar transistor device of claim 12 , wherein a sidewall of the seed region is coupled to the base region.
14 . The bipolar transistor device of claim 12 , wherein the seed region is formed in a second semiconductor region, and wherein a second isolation region is formed between the collector sidewall and the second semiconductor region.
15 . The bipolar transistor device of claim 12 , further comprising a lateral link region formed between the extrinsic base region and the base region, wherein the lateral link region includes a base link portion that is coupled to a sidewall of the extrinsic base region and to a portion of the base region.
16 . A method of forming a bipolar transistor device, the method comprising:
forming a semiconductor substrate;
forming an isolation region within the semiconductor substrate;
forming a collector region laterally adjacent the isolation region within the semiconductor substrate in a first semiconductor region, wherein the collector region includes an upper surface and a collector sidewall;
forming a base region over the collector region;
forming a dielectric region over at least a portion of the semiconductor substrate and over the collector sidewall;
forming a seed region over the semiconductor substrate within a seed opening in the dielectric region and coupled to the semiconductor substrate outside the base region, wherein a proximal portion of the seed region directly contacts an upper surface of a monocrystalline portion of the semiconductor substrate, and wherein the proximal portion of the seed region in contact with the semiconductor substrate has a first length and a distal portion of the seed region directly over the proximal portion has a second length, wherein the first length is less than the second length,
wherein a portion of the dielectric region separates the base region from the seed region;
forming an extrinsic base region over and coupled to the distal portion of the seed region having a first portion formed between and laterally adjacent the seed region and the base region, wherein at least a portion of the extrinsic base region is monocrystalline; and
forming an emitter region over the base region.
17 . The method of claim 16 , wherein forming the seed region includes non-selective epitaxy.
18 . The method of claim 16 , wherein forming the seed region includes selective epitaxy.