IP Library Granted Patent US 12690208
Granted Patent B2
US 12690208 · App. 18/040,953 · Granted Jul 21, 2026

Semiconductor device

Inventor: Tomohito Kudo (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H10D12/411H10D62/137
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Quick Facts
Patent No.
US 12690208
App. No.
18/040,953
Granted
Jul 21, 2026
Kind
B2
Abstract

A semiconductor substrate ( 1 ) includes a main region ( 2 ) and a sense region ( 3 ) having a smaller operation region area than that of the main region ( 2 ). An IGBT is formed in the main region ( 2 ). A MOSFET is formed as a sense device in the sense region ( 3 ) and has a gate electrode ( 15 ) connected to a gate electrode ( 15 ) of the IGBT. A front surface electrode ( 5 ) is formed on a front surface of the semiconductor substrate ( 1 ) in the main region ( 2 ). A rear surface electrode ( 20 ) is formed on a rear surface of the semiconductor substrate ( 1 ) in the main region ( 2 ) and the sense region ( 3 ). A current detection electrode ( 6 ) is formed on the front surface in the sense region ( 3 ) and separated from the front surface electrode ( 5 ).

Claims (35)

1 . A semiconductor device comprising:

a semiconductor substrate including a main region and a sense region having a smaller operation region area than that of the main region;

an IGBT formed in the main region;

a MOSFET formed as a sense device in the sense region and having a gate electrode connected to a gate electrode of the IGBT;

a front surface electrode formed on a front surface of the semiconductor substrate in the main region;

a rear surface electrode formed on a rear surface of the semiconductor substrate in the main region and the sense region such that the rear surface electrode electrically contacts a collector layer of the IGBT and a drain layer of the MOSFET; and

a current detection electrode formed on the front surface in the sense region and separated from the front surface electrode, wherein

a trench is positioned in the semiconductor substrate between the IGBT and the MOSFET, the trench being spaced from all source layers of the MOSFET and all emitter layers of the IGBT,

the MOSFET and the IGBT each comprise a first layer of a same conductivity type as the collector layer, and the MOSFET and the IGBT each comprise a second layer of the same conductivity type as the collector layer, the second layer having a higher impurity concentration than that of the first layer, and

the trench is spaced from the second layer of the MOSFET and the IGBT.

2 . The semiconductor device according to claim 1 , further comprising a diode formed in the main region.

3 . A semiconductor device comprising:

a semiconductor substrate including a main region and a sense region having a smaller operation region area than that of the main region;

a MOSFET formed in the main region;

an IGBT formed as a sense device in the sense region and having a gate electrode connected to a gate electrode of the MOSFET;

a front surface electrode formed on a front surface of the semiconductor substrate in the main region;

a rear surface electrode formed on a rear surface of the semiconductor substrate in the main region and the sense region such that the rear surface electrode electrically contacts a drain layer of the MOSFET and a collector layer of the IGBT; and

a current detection electrode formed on the front surface in the sense region and separated from the front surface electrode, wherein

a trench is positioned in the semiconductor substrate between the IGBT and the MOSFET, the trench being spaced from all source layers of the MOSFET and all emitter layers of the IGBT,

the MOSFET and the IGBT each comprise a first layer of a same conductivity type as the collector layer, and the MOSFET and the IGBT each comprise a second layer of the same conductivity type as the collector layer, the second layer having a higher impurity concentration than that of the first layer, and

the trench is spaced from the second layer of the MOSFET and the IGBT.

4 . The semiconductor device according to claim 1 , wherein the IGBT has the p-type collector layer on the rear surface side of the semiconductor substrate, and

the MOSFET does not have a p-type collector layer on the rear surface side of the semiconductor substrate.

5 . The semiconductor device according to claim 1 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

6 . The semiconductor device according to claim 2 , wherein the IGBT has the p-type collector layer on the rear surface side of the semiconductor substrate, and

the MOSFET does not have a p-type collector layer on the rear surface side of the semiconductor substrate.

7 . The semiconductor device according to claim 3 , wherein the IGBT has the p-type collector layer on the rear surface side of the semiconductor substrate, and

the MOSFET does not have a p-type collector layer on the rear surface side of the semiconductor substrate.

8 . The semiconductor device according to claim 2 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

9 . The semiconductor device according to claim 3 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

10 . The semiconductor device according to claim 4 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

11 . The semiconductor device according to claim 6 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

12 . The semiconductor device according to claim 7 , wherein the semiconductor substrate is formed of a wide-bandgap semiconductor.

13 . The semiconductor device according to claim 1 , wherein the rear surface electrode directly electrically contacts the collector layer of the IGBT and the drain layer of the MOSFET, the collector layer of the IGBT and the drain layer of the MOSFET having different conductivity types.

14 . The semiconductor device according to claim 3 , wherein the rear surface electrode directly electrically contacts the collector layer of the IGBT and the drain layer of the MOSFET, the collector layer of the IGBT and the drain layer of the MOSFET having different conductivity types.