Multi-threshold voltage devices and associated techniques and configurations
Embodiments of the present disclosure describe multi-threshold voltage devices and associated techniques and configurations. In one embodiment, an apparatus includes a semiconductor substrate, a channel body disposed on the semiconductor substrate, a first gate electrode having a first thickness coupled with the channel body and a second gate electrode having a second thickness coupled with the channel body, wherein the first thickness is greater than the second thickness. Other embodiments may be described and/or claimed.
1 . An integrated circuit, comprising:
a semiconductor substrate;
a fin structure disposed on the semiconductor substrate;
a first N-type fin-FET device comprising a first gate electrode having a first electrode material layer, the first electrode material layer having a first thickness;
a second N-type fin-FET device comprising a second gate electrode having a second electrode material layer, the second electrode material layer having a second thickness greater than the first thickness; and
a first P-type fin-FET device comprising a third gate electrode having a third electrode material layer, the third electrode material layer having a third thickness approximately equal to the second thickness, wherein
the first electrode material layer, the second electrode material layer and the third electrode material layer have a first chemical composition,
the first electrode material layer, the second electrode material layer and the third electrode material layer each have a U-shape in a cross-sectional view, and
a gate dielectric is disposed between the fin structure and the first electrode material layer, between the fin structure and the second electrode material layer and between the fin structure and the third electrode material layer.
2 . The integrated circuit of claim 1 , further comprising:
a second P-type fin-FET device comprising a fourth gate electrode having a fourth electrode material layer, the fourth electrode material layer having the first chemical composition, the fourth electrode material layer having a fourth thickness greater than the third thickness, and the fourth electrode material layer having the U-shape in the cross-sectional view.
3 . The integrated circuit of claim 2 , further comprising:
a third P-type fin-FET device comprising a fifth gate electrode having a fifth electrode material layer, the fifth electrode material layer having the first chemical composition, the fifth electrode material layer having a fifth thickness greater than the fourth thickness, and the fifth electrode material layer having the U-shape in the cross-sectional view.
4 . The integrated circuit of claim 3 , wherein a thickness of the fifth gate electrode is approximately equal to a thickness of the third gate electrode.
5 . The integrated circuit of claim 2 , wherein a thickness of the fourth gate electrode is approximately equal to a thickness of the third gate electrode.
6 . The integrated circuit of claim 2 , wherein:
the first gate electrode has a sixth electrode material layer having a second chemical composition which is different from the first chemical composition,
the second gate electrode has a seventh electrode material layer having the second chemical composition,
the third gate electrode has an eighth electrode material layer having the second chemical composition, and
the fourth gate electrode has a nineth electrode material layer having the second chemical composition.
7 . The integrated circuit of claim 6 , further comprising:
a third N-type fin-FET device comprising a sixth gate electrode, wherein a thickness of the sixth gate electrode is approximately equal to a thickness of the first gate electrode, the second gate electrode, the third gate electrode and the fourth gate electrode.
8 . The integrated circuit of claim 1 , further comprising:
a third N-type fin-FET device comprising a sixth gate electrode, wherein a thickness of the sixth gate electrode is approximately equal to a thickness of the second gate electrode.
9 . The integrated circuit of claim 1 , wherein
a thickness of the second gate electrode is equal to a thickness of the second gate electrode and a thickness of the third gate electrode.
10 . The integrated circuit of claim 1 , wherein:
the first gate electrode has a sixth electrode material layer having a second chemical composition which is different from the first chemical composition,
the second gate electrode has a seventh electrode material layer having the second chemical composition, and
the third gate electrode has an eighth electrode material layer having the second chemical composition.
11 . The integrated circuit of claim 1 , wherein:
the first N-type fin-FET device has a first threshold voltage,
the second N-type fin-FET device has a second threshold voltage, and the first threshold voltage is different from the second threshold voltage.
12 . The integrated circuit of claim 11 , wherein:
modulation of the first threshold voltage and the second threshold voltage is accomplished by varying the first thickness without implanting the fin structure with n-type or p-type impurities.
13 . The integrated circuit of claim 1 , wherein the second thickness is approximately twice the first thickness.
14 . The integrated circuit of claim 1 , wherein the first electrode material layer, the second electrode material layer and the third electrode material layer are respective single layers that have the first chemical composition.
15 . An electronic device comprising:
a semiconductor substrate;
a fin structure disposed on the semiconductor substrate;
a first N-type fin-FET device comprising a first gate electrode having a first electrode material layer, the first electrode material layer having a first thickness;
a second N-type fin-FET device comprising a second gate electrode having a second electrode material layer, the second electrode material layer having a second thickness greater than the first thickness; and
a first P-type fin-FET device comprising a third gate electrode having a third electrode material layer, the third electrode material layer having a third thickness approximately equal to the second thickness, wherein
the first electrode material layer, the second electrode material layer and the third electrode material layer have a first chemical composition,
the first electrode material layer, the second electrode material layer and the third electrode material layer each have a U-shape in a cross-sectional view, and
a gate dielectric is disposed between the fin structure and the first electrode material layer, between the fin structure and the second electrode material layer and between the fin structure and the third electrode material layer.
16 . The electronic device of claim 15 , further comprising:
a second P-type fin-FET device comprising a fourth gate electrode having a fourth electrode material layer, the fourth electrode material layer having the first chemical composition, the fourth electrode material layer having a fourth thickness greater than the third thickness, and the fourth electrode material layer having the U-shape in the cross-sectional view.
17 . The electronic device of claim 16 , wherein:
the first gate electrode has a sixth electrode material layer having a second chemical composition which is different from the first chemical composition,
the second gate electrode has a seventh electrode material layer ( 446 ) having the second chemical composition,
the third gate electrode has an eighth electrode material layer having the second chemical composition, and
the fourth gate electrode has a nineth electrode material layer having the second chemical composition.
18 . The electronic device of claim 17 , wherein the second thickness is approximately twice the first thickness.
19 . The electronic device of claim 18 , further comprising:
a third N-type fin-FET device comprising a sixth gate electrode, wherein a thickness of the sixth gate electrode is approximately equal to a thickness of the first gate electrode, the second gate electrode, the third gate electrode and the fourth gate electrode.
20 . The electronic device of claim 15 , further comprising:
a third N-type fin-FET device comprising a sixth gate electrode, wherein a thickness of the sixth gate electrode is approximately equal to a thickness of the second gate electrode.
21 . The electronic device of claim 15 , wherein:
the first gate electrode has a sixth electrode material layer having a second chemical composition which is different from the first chemical composition,
the second gate electrode has a seventh electrode material layer having the second chemical composition, and
the third gate electrode has an eighth electrode material layer having the second chemical composition.
22 . The electronic device of claim 15 , wherein the first electrode material layer, the second electrode material layer and the third electrode material layer are respective single layers that have the first chemical composition.