IP Library Granted Patent US 12690225
Granted Patent B2
US 12690225 · App. 18/311,102 · Granted Jul 21, 2026

High voltage semiconductor device and method of manufacturing same

Inventors: Jong Min Kim (Seoul, KR); Geum Ho Ahn (Seoul, KR)
Assignee: DB HiTek Co., Ltd.
H10D30/65H10D30/0281H10D30/6891H10D64/112
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Quick Facts
Patent No.
US 12690225
App. No.
18/311,102
Granted
Jul 21, 2026
Kind
B2
Abstract

Disclosed is a high voltage semiconductor device and a method of manufacturing the same and, more particularly, a high voltage semiconductor device and a method of manufacturing the same enabling more effective integration through improvement of breakdown voltage (BV) characteristics during device turn-on and/or turn-off and consequent improvement of specific on-resistance (Rsp) characteristics by forming or including a floating gate and/or a connection structure on a substrate, between a gate electrode and a drain.

Claims (38)

1 . A high voltage semiconductor device comprising:

a substrate;

a drift region on the substrate;

a body region on the substrate;

a drain in the drift region;

a source in the body region;

a gate insulating film on the substrate, and a gate electrode on the gate insulating film;

an insulating pattern on the gate electrode and the substrate;

a conductive field plate on the insulating pattern; and

a first floating gate between the gate electrode and the drain, wherein:

the insulating pattern extends continuously from an uppermost surface of the gate electrode to an uppermost surface of the floating gate, and

the conductive field plate comprises a first plate having one end on the gate electrode and an opposite end on the first floating gate, and a second plate spaced apart from the first plate and having one end on the first floating gate.

2 . The high voltage semiconductor device of claim 1 , further comprising:

a body contact, adjacent to or in contact with the source.

3 . The high voltage semiconductor device of claim 1 , further comprising:

a deep well in the substrate, under the drift region; and

a buried layer in the substrate, under the deep well.

4 . The high voltage semiconductor device of claim 1 , further comprising a second floating gate, physically spaced apart from the first floating gate, wherein the first and second floating gates are on the substrate.

5 . The high voltage semiconductor device of claim 1 , wherein the floating gate is substantially coplanar with the gate electrode.

6 . The high voltage semiconductor device of claim 1 , wherein the floating gate has a substantially identical composition and a substantially identical height as the gate electrode.

7 . The high voltage semiconductor device of claim 6 , comprising a plurality of the floating gates, physically spaced apart from each other on the substrate, and between the gate electrode and the drain.

8 . The high voltage semiconductor device of claim 1 , further comprising:

an insulating spacer on a sidewall of the floating gate.

9 . The high voltage semiconductor device of claim 1 , further comprising:

a drain contact connecting the drain and a drain electrode;

a connection structure connected to the drain contact.

10 . The high voltage semiconductor device of claim 9 , wherein the connection structure has a substantially identical composition and a substantially identical height as the gate electrode.

11 . The high voltage semiconductor device of claim 10 , wherein the connection structure has a substantially uniform thickness and is substantially coplanar with the gate electrode.

12 . The high voltage semiconductor device of claim 9 , wherein one end of the insulating pattern is on an uppermost surface of the connection structure.

13 . The high voltage semiconductor device of claim 12 , wherein the floating gate has a substantially uniform thickness and is substantially coplanar with the gate electrode.

14 . The high voltage semiconductor device of claim 12 , wherein the floating gate has a substantially identical composition and a substantially identical height as the gate electrode.

15 . The high voltage semiconductor device of claim 14 , further comprising:

an insulating film between the floating gate and the substrate.

16 . The high voltage semiconductor device of claim 15 , comprising a plurality of the field plates, physically spaced apart from each other, on the insulating pattern.

17 . The high voltage semiconductor device of claim 4 , wherein the second plate has an opposite end on the second floating gate.

18 . The high voltage semiconductor device of claim 17 , wherein the conductive field plate further comprises a third plate spaced apart from the second plate and closer to the drain than is the second plate.

19 . The high voltage semiconductor device of claim 18 , wherein the opposite end of the second plate is on a first side of the second floating gate, and the one end of the third plate is on an opposite side of the second plate.

20 . The high voltage semiconductor device of claim 9 , wherein the gate electrode, the first floating gate, and the connection structure include conductive polysilicon, a metal, a conductive metal nitride, or a combination thereof.