Superjunction semiconductor device having varying impurity concentrations between semiconductor substrate and parallel PN structure
A superjunction semiconductor device having a termination structure portion surrounding an active region in a plan view. The device includes: a semiconductor substrate; a first semiconductor layer provided on the semiconductor substrate; and a parallel pn structure and a channel stopper provided in the first semiconductor layer. The channel stopper surrounds the parallel pn structure in the plan view, and contacts the parallel pn structure in the termination structure portion. The parallel pn structure includes a plurality of first columns each having a first width and a plurality of second columns each having a second width that repeatedly alternate one another parallel to the main surface. In a region of the parallel pn structure contacting the channel stopper, a product of the second width and an impurity concentration of the second columns is less than a product of the first width and an impurity concentration of the first columns.
1 . A superjunction semiconductor device, having
an active region through which a current flows, and
a termination structure portion, which is disposed at an outer periphery of the active region in a plan view of the superjunction semiconductor device, and in which a voltage withstanding structure is formed,
the superjunction semiconductor device comprising:
a semiconductor substrate of a first conductivity type having a main surface;
a first semiconductor layer of the first conductivity type, provided on the main surface of the semiconductor substrate, the first semiconductor layer having an impurity concentration that is lower than an impurity concentration of the semiconductor substrate;
a parallel pn structure provided in the first semiconductor layer at a surface thereof; and
a channel stopper provided in the first semiconductor layer at the surface thereof, the channel stopper surrounding the parallel pn structure in the plan view of the device, and being in contact with the parallel pn structure in the termination structure portion, wherein
the parallel pn structure includes:
a plurality of first columns of the first conductivity type each having a first width in a width direction, and
a plurality of second columns of a second conductivity type each having a second width in the width direction,
the first and second columns repeatedly alternating one another in a striped pattern parallel to the main surface; and
the parallel pn structure has a region that is in contact with the channel stopper and overlaps the channel stopper in the plan view, and in said region a product obtained by multiplying the second width and an impurity concentration of the plurality of second columns is less than a product obtained by multiplying the first width and an impurity concentration of the plurality of first columns.
2 . The superjunction semiconductor device according to claim 1 , further comprising in the active region:
a second semiconductor layer of the second conductivity type, provided at a surface of the parallel pn structure;
a first semiconductor region of the first conductivity type, selectively provided in the second semiconductor layer, at a surface of the second semiconductor layer;
a gate insulating film provided at the surface of the second semiconductor layer, the gate insulating film having a first surface and a second surface opposite to each other, the second surface being in contact with the second semiconductor layer; and
a gate electrode provided on the first surface of gate insulating film.
3 . The superjunction semiconductor device according to claim 1 , wherein the plurality of first columns and the plurality of second columns of the parallel pn structure are separated from the semiconductor substrate.
4 . The superjunction semiconductor device according to claim 1 , wherein the semiconductor substrate contains a wide band gap semiconductor.
5 . The superjunction semiconductor device according to claim 1 , wherein the channel stopper is of the first conductivity type.
6 . The superjunction semiconductor device according to claim 1 , wherein
the semiconductor substrate contains a silicon carbide semiconductor,
the first conductivity type is an n-type formed by an addition of nitrogen to the silicon carbide semiconductor, and
the second conductivity type is a p-type formed by an addition of aluminum to the silicon carbide semiconductor.
7 . A superjunction semiconductor device, having
an active region through which a current flows, and
a termination structure portion, which is disposed at an outer periphery of the active region in a plan view of the superjunction semiconductor device, and in which a voltage withstanding structure is formed,
the superjunction semiconductor device comprising:
a semiconductor substrate of a first conductivity type having a main surface;
a first semiconductor layer of the first conductivity type, provided on the main surface of the semiconductor substrate, the first semiconductor layer having an impurity concentration that is lower than an impurity concentration of the semiconductor substrate;
a parallel pn structure provided in the first semiconductor layer at a surface thereof; and
a channel stopper provided in the first semiconductor layer at the surface thereof, the channel stopper surrounding the parallel pn structure in the plan view of the device, and being in contact with the parallel pn structure in the termination structure portion, wherein
the channel stopper has a plurality of linear portions and a plurality of corner portions;
the parallel pn structure includes:
a plurality of first columns of the first conductivity type each having a first width in a width direction, and
a plurality of second columns of a second conductivity type each having a second width in the width direction,
the first and second columns repeatedly alternating one another in a striped pattern parallel to the main surface;
the plurality of second columns are provided apart from the channel stopper in a longitudinal direction that is orthogonal to the width direction, a first distance, which is a distance in the longitudinal direction between the channel stopper and an end of any of the plurality of second columns at the linear portions of the channel stopper, being uniform and being no greater than a second distance that is a distance in the longitudinal direction between the channel stopper and an end of any of the plurality of second columns at the corner portions of the channel stopper;
at the ends of the plurality of second columns, a product obtained by multiplying the second width and an impurity concentration of the plurality of second columns is at least equal to a product obtained by multiplying the first width and an impurity concentration of the plurality of first columns; and
the plurality of second columns are implanted with an impurity of the second conductivity type, and an activation rate of the implanted impurity is greater than 70% but not more than 90%.
8 . The superjunction semiconductor device according to claim 7 , wherein
the plurality of second columns and the channel stopper are apart from each other by at least 0.1 μm in the longitudinal direction.
9 . The superjunction semiconductor device according to claim 7 , wherein
the plurality of second columns and the channel stopper are apart from each other by at least 0.4 μm in the longitudinal direction.
10 . The superjunction semiconductor device according to claim 7 , wherein
the ends of the plurality of second columns of the parallel pn structure, in the longitudinal direction, are staggered at each of the corner portions of the channel stopper according to a curvature of said each corner portion of the channel stopper.
11 . The superjunction semiconductor device according to claim 7 , further comprising in the active region:
a second semiconductor layer of the second conductivity type, provided at a surface of the parallel pn structure;
a first semiconductor region of the first conductivity type, selectively provided in the second semiconductor layer, at a surface of the second semiconductor layer;
a gate insulating film provided at the surface of the second semiconductor layer, the gate insulating film having a first surface and a second surface opposite to each other, the second surface being in contact with the second semiconductor layer; and
a gate electrode provided on the first surface of gate insulating film.
12 . The superjunction semiconductor device according to claim 7 , wherein
the plurality of first columns and the plurality of second columns of the parallel pn structure are separated from the semiconductor substrate.
13 . The superjunction semiconductor device according to claim 7 , wherein
the semiconductor substrate contains a wide band gap semiconductor.
14 . The superjunction semiconductor device according to claim 7 , wherein
the channel stopper is of the first conductivity type.
15 . The superjunction semiconductor device according to claim 7 , wherein
the semiconductor substrate contains a silicon carbide semiconductor,
the first conductivity type is an n-type formed by an addition of nitrogen to the silicon carbide semiconductor, and
the second conductivity type is a p-type formed by an addition of aluminum to the silicon carbide semiconductor.