IP Library › Granted Patent US 12690234
Granted Patent B2
US 12690234 · App. 17/925,085 · Granted Jul 21, 2026

Thin-film transistor having a vertical structure and an electronic device

Inventors: Zhifu Li (Wuhan, CN); Guanghui Liu (Wuhan, CN); Fei Ai (Wuhan, CN); Dewei Song (Wuhan, CN); Chengzhi Luo (Wuhan, CN)
Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
H10D30/6728H10D30/0321H10D30/6713H10D30/6723H10D30/6745H10D30/6757H10D86/0221H10D86/421H10D86/60
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Quick Facts
Patent No.
US 12690234
App. No.
17/925,085
Granted
Jul 21, 2026
Kind
B2
Abstract

The present application provides a thin-film transistor having a vertical structure and an electronic device. In the thin-film transistor having the vertical structure, the thin-film transistor includes a first doped portion and a second portion, the second doped portion is connected to and partly in contact with a channel portion through a via hole by arranging the second doped portion in the via hole of an insulating layer, which can reduce a contact area between the second doped portion and the channel portion, thereby reducing ions diffusing into a channel region and improving device stability of the thin-film transistor. Also, in the thin-film transistor having the vertical structure, a projection area of the thin-film transistor can be reduced, improving an aperture ratio of a display panel.

Claims (29)

1 . A thin-film transistor having a vertical structure, comprising:

an insulating substrate;

an active layer, disposed on a side of the insulating substrate, the active layer comprising a first doped portion, a channel portion, and a second doped portion provided in a stack; and

an insulating layer, disposed on a side of the channel portion away from the first doped portion, the insulating layer comprising via holes, and the via holes including a first via hole and a second via hole;

wherein the second doped portion is disposed in the second via hole, the second doped portion is connected to and partly in contact with the channel portion through the second via hole, and a contact area between the second doped portion and the channel portion is smaller than a surface area of the channel portion in contact with the second doped portion surface.

2 . The thin-film transistor having the vertical structure as claimed in claim 1 , wherein the thin-film transistor having the vertical structure further comprises a source/drain layer, the source/drain layer is disposed on a side of the insulating layer away from the active layer, the source/drain layer comprises a first electrode and a second electrode, the first electrode is electrically connected to the first doped portion through the first via hole, and the second electrode is in contact with and electrically connected to the second doped portion.

3 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein a first material of the first doped portion comprises N-type doped polysilicon, and a second material of the second doped portion comprises N-type doped amorphous silicon.

4 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein a doping ion concentration of the first doped portion on a side close to the insulating substrate is greater than a doping ion concentration of the first doped portion on a side close to the channel portion.

5 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein the first doped portion comprises a heavily doped portion and a lightly doped portion, a doping ion concentration of the heavily doped portion of the first doped portion is greater than a doping ion concentration of the lightly doped portion of the first doped portion, and the lightly doped portion of the first doped portion is disposed between the heavily doped portion of the first doped portion and the channel portion.

6 . The thin-film transistor having the vertical structure as claimed in claim 5 , wherein the lightly doped portion of the first doped portion comprises a third via hole, and the first electrode is electrically connected to the heavily doped portion of the first doped portion through the first via hole and the third via hole, and the first electrode is electrically connected to the lightly doped portion of the first doped portion through the first via hole and the third via hole.

7 . The thin-film transistor having the vertical structure as claimed in claim 5 , wherein a width of the heavily doped portion of the first doped portion is greater than a width of the lightly doped portion of the first doped portion, and the first electrode is electrically connected to the heavily doped portion of the first doped portion through the first via hole.

8 . The thin-film transistor having the vertical structure as claimed in claim 5 , wherein a first material of the first doped portion comprises N-type doped amorphous silicon.

9 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein a doping ion concentration of the second doped portion on a side close to the source/drain layer is greater than a doping ion concentration of the second doped portion on a side close to the channel portion.

10 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein the second doped portion comprises a heavily doped portion and a lightly doped portion, and a doping ion concentration of the heavily doped portion of the second doped portion is greater than a doping ion concentration of the lightly doped portion of the second doped portion, the lightly doped portion of the second doped portion is disposed between the heavily doped portion of the second doped portion and the channel portion, and the lightly doped portion of the second doped portion is in contact with a side part of the heavily doped portion of the second doped portion.

11 . The thin-film transistor having the vertical structure as claimed in claim 10 , wherein a ratio of a thickness of the heavily doped portion of the second doped portion to a thickness of the lightly doped portion of the second doped portion is greater than or equal to 5.

12 . The thin-film transistor having the vertical structure as claimed in claim 10 , wherein the second electrode extends into the second via hole, and the heavily doped portion of the second doped portion is in contact with a side surface of the second electrode.

13 . The thin-film transistor having the vertical structure as claimed in claim 10 , wherein a ratio of the doping ion concentration of the heavily doped portion of the second doped portion to the doping ion concentration of the lightly doped portion of the second doped portion is 10:1.

14 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein the second doped portion comprises a first portion disposed on the insulating layer away from the channel portion and a second portion located in the second via hole, and the first portion is connected to the second portion.

15 . The thin-film transistor having the vertical structure as claimed in claim 2 , wherein a diameter of the second via hole ranges from 2 μm to 4 μm.

16 . The thin-film transistor having the vertical structure as claimed in claim 1 , wherein a width of the first doped portion is greater than a width of the channel portion.

17 . The thin-film transistor having the vertical structure as claimed in claim 1 , wherein the thin-film transistor having the vertical structure further comprises a gate disposed on a sidewall of the insulating layer, and an orthographic projection of the gate on the sidewall of the insulating layer covers the channel portion.

18 . The thin-film transistor having the vertical structure as claimed in claim 17 , wherein the thin-film transistor having the vertical structure further comprises:

a light-shielding layer disposed between the insulating substrate and the active layer, and an orthographic projection of the light-shielding layer on the insulating substrate covers at least an orthographic projection of the second doped portion on the insulating substrate.

19 . The thin-film transistor having the vertical structure as claimed in claim 18 , wherein the gate is connected to the light-shielding layer.

20 . An electronic device, wherein the electronic device comprises a thin-film transistor having a vertical structure, and the thin-film transistor having the vertical structure comprising:

an insulating substrate;

an active layer, disposed on a side of the insulating substrate, the active layer comprising a first doped portion, a channel portion, and a second doped portion provided in a stack; and

an insulating layer, disposed on a side of the channel portion away from the first doped portion, the insulating layer comprising via holes, and the via holes including a first via hole and a second via hole;

wherein the second doped portion is disposed in the second via hole, the second doped portion is connected to and partly in contact with the channel portion through the second via hole, and a contact area between the second doped portion and the channel portion is smaller than a surface area of the channel portion in contact with the second doped portion surface.