IP Library Granted Patent US 12690247
Granted Patent B2
US 12690247 · App. 18/531,808 · Granted Jul 21, 2026

Steep-switching transistor including three-dimensional Dirac energy filter

Inventors: Bogdan Cezar Zota (Rüschlikon, CH); Lorenzo Rocchino (Zurich, CH); Federico Balduini (Switzerland, CH); Heinz Schmid (Waedenswil, CH); Bernd W. Gotsmann (Horgen, CH)
Assignee: International Business Machines Corporation
H10D62/151H10D30/014H10D30/43H10D30/6735H10D62/121
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Quick Facts
Patent No.
US 12690247
App. No.
18/531,808
Granted
Jul 21, 2026
Kind
B2
Abstract

A semiconductor structure includes a nanosheet stack on a substrate. The nanosheet stack has alternating layers of channel nanosheets and sacrificial nanosheets, which are formed between a first source/drain (S/D) region and a second S/D region. The semiconductor structure further includes a gate structure on the nanosheet stack, and a three-dimensional (3D) Dirac energy filter. The three-dimensional (3D) Dirac energy filter is formed on a portion of the substrate located in the first S/D region and includes a portion that contacts the nanosheet stack. A first S/D is on the 3D Dirac energy filter in the first S/D region, and a second S/D is on the substrate of the second S/D region.

Claims (11)

1 . A method of fabricating a semiconductor structure comprising:

forming a nanosheet stack over a substrate, the nanosheet stack including alternating layers of channel nanosheets and sacrificial nanosheets between a first source/drain (S/D) region and a second S/D region;

forming a gate structure on the nanosheet stack;

forming a three-dimensional (3D) Dirac energy filter comprising a 3D Dirac material on a portion of the substrate located in the first S/D region, the 3D Dirac energy filter extending from the substrate and contacting the nanosheet stack; and

forming a first S/D on the 3D Dirac energy filter in the first S/D region, and forming a second S/D on the substrate of the second S/D region.

2 . The method of claim 1 , wherein the 3D Dirac energy filter is formed between the first S/D and the nanosheet stack.

3 . The method of claim 2 , wherein the 3D Dirac material comprises at least one of cobalt monosilicide (CoSi), Calcium arsenide (Ca3As2), niobium phosphate (NbP), tungsten phosphide (WP2), Molybdenum Phosphide (MoP2), and Bismuth (Bi).

4 . The method of claim 3 , wherein forming the 3D Dirac energy filter comprises epitaxially growing the 3D Dirac material from the channel nanosheets and the substrate located in the first S/D region.

5 . The method of claim 1 , wherein the channel nanosheets comprise silicon (Si) and the sacrificial nanosheets comprise silicon germanium (SiGe).

6 . The method of claim 1 , wherein the 3D Dirac energy filter is formed against an end region of all the channel nanosheets included in the nanosheet stack.

7 . The method of claim 1 , wherein the first S/D is formed to have a first size and the second S/D is formed to have a second size different from the first size of the first S/D.