IP Library Granted Patent US 12690250
Granted Patent B2
US 12690250 · App. 18/311,563 · Granted Jul 21, 2026

Semiconductor device and method for forming the same

Inventors: Shih-Yen Lin (New Taipei City, TW); Po-Cheng Tsai (Taichung City, TW)
Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.; NATIONAL TAIWAN UNIVERSITY
H10D62/882H10D84/0128H10D84/0158H10D84/038H10P14/3406H10P14/3436
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Quick Facts
Patent No.
US 12690250
App. No.
18/311,563
Granted
Jul 21, 2026
Kind
B2
Abstract

A semiconductor device includes a substrate. A 2-D material channel layer is over the substrate, in which the 2-D material channel layer includes a channel region and source/drain regions on opposite sides of the channel region. Source/drain metals are over of the source/drain regions of the 2-D material channel layer. A gate metal is over the substrate and non-overlapping the 2-D material channel layer along a vertical direction, in which the gate metal is laterally separated from the 2-D material channel layer by an air gap.

Claims (37)

1 . A method, comprising:

forming a 2-D material layer over a substrate;

forming a gate contact electrode and source/drain contact electrodes over the 2-D material layer;

forming a gate metal extending from a top surface of the gate contact electrode to a sidewall of the gate contact electrode;

forming a first patterned mask covering a channel region of the 2-D material layer, wherein the first patterned mask non-overlaps the gate contact electrode along a vertical direction;

etching portions of the 2-D material layer uncovered by the first patterned mask, such that the channel region of the 2-D material layer is laterally separated from the gate contact electrode and the gate metal, wherein a lateral distance between the gate metal and the channel region of the 2-D material layer is less than a lateral distance between the gate contact electrode and the channel region of the 2-D material layer; and

removing the first patterned mask.

2 . The method of claim 1 , further comprising forming a 2-D material passivation layer over the 2-D material layer prior to forming the gate contact electrode and the source/drain contact electrodes.

3 . The method of claim 1 , wherein the first patterned mask non-overlaps the gate metal along the vertical direction.

4 . The method of claim 1 , wherein the 2-D material layer comprises a remaining portion under the gate contact electrode after etching the portions of the 2-D material layer, wherein the remaining portion of the 2-D material layer is laterally separated from the channel region of the 2-D material layer.

5 . The method of claim 1 , wherein the 2-D material layer comprises graphene.

6 . A method, comprising:

forming a 2-D material layer over a substrate;

forming a gate contact electrode and source/drain contact electrodes over the 2-D material layer;

forming a metal layer over the 2-D material layer, wherein the metal layer comprises source/drain metals and a gate metal, wherein the gate metal extends from a top surface of the gate contact electrode to a sidewall of the gate contact electrode; and

patterning the 2-D material layer to define a channel region of the 2-D material layer between the source/drain metals in a first cross-sectional view, wherein the gate metal does not overlap the channel region of the 2-D material layer in the first cross-sectional view, and wherein in a second cross-sectional view that is perpendicular to the first cross-sectional view, a lateral distance between the gate metal and the channel region of the 2-D material layer is less than a lateral distance between the gate contact electrode and the channel region of the 2-D material layer.

7 . The method of claim 6 , further comprising depositing a passivation layer over the 2-D material layer prior to forming the metal layer.

8 . The method of claim 7 , wherein the passivation layer is made of a 2-D material.

9 . The method of claim 7 , wherein the passivation layer and the 2-D material layer are made of different 2-D materials.

10 . The method of claim 6 , wherein patterning the 2-D material layer comprises removing a portion of the 2-D material layer, such that in the second cross-sectional view, the channel region of the 2-D material layer is spaced apart from a remaining portion of the 2-D material layer under the gate metal through an air gap.

11 . The method of claim 10 , wherein in the second cross-sectional view the gate metal is spaced apart from the channel region of the 2-D material layer by a non-zero distance.

12 . The method of claim 10 , wherein the air gap exposes a top surface of the substrate.

13 . The method of claim 6 , wherein the 2-D material layer comprises graphene.

14 . A method, comprising:

forming a 2-D material layer over a substrate;

forming a 2-D material passivation layer over the 2-D material layer

forming an electrode layer over the 2-D material passivation layer, the electrode layer comprising source/drain contact electrodes and a gate contact electrode;

forming a metal layer over the 2-D material layer, wherein the metal layer comprises source/drain metals and a gate metal, wherein the gate metal extends from a top surface of the gate contact electrode to a sidewall of the gate contact electrode; and

patterning the 2-D material layer and the 2-D material passivation layer to define a channel region of the 2-D material layer between the source/drain metals in a first cross-sectional view, in a second cross-sectional view that is perpendicular to the first cross-sectional view, the 2-D material passivation layer having a first portion covering a top surface of the channel region of the 2-D material layer, and a second portion below the gate contact electrode, and the first portion is spaced apart from the second portion, and wherein in the second cross-sectional view, a lateral distance between the gate metal and the channel region of the 2-D material layer is less than a lateral distance between the gate contact electrode and the channel region of the 2-D material layer.

15 . The method of claim 14 , wherein the 2-D material passivation layer and the 2-D material layer are made of different materials.

16 . The method of claim 14 , wherein patterning the 2-D material layer and the 2-D material passivation layer comprises:

forming a mask covering the first portion of the 2-D material passivation layer; and

etching the 2-D material layer and the 2-D material passivation layer to expose a top surface of the substrate.

17 . The method of claim 14 , wherein in the second cross-sectional view the gate contact electrode does not overlap the first portion of the 2-D material passivation layer.

18 . The method of claim 14 , wherein in the second cross-sectional view the gate contact electrode is spaced apart from the channel region of the 2-D material layer by a non-zero distance.

19 . The method of claim 14 , wherein the gate contact electrode is absent in the first cross-sectional view.

20 . The method of claim 14 , wherein the 2-D material passivation layer is made of transition metal dichalcogenide (TMD).