IP Library Granted Patent US 12690403
Granted Patent B2
US 12690403 · App. 18/203,404 · Granted Jul 21, 2026

Halogen-free etching of silicon nitride

Inventors: Zhiren Luo (San Jose, CA); Jeong Hwan Kim (San Jose, CA); Qian Fu (Pleasanton, CA); Abhijeet S. Bagal (Sunnyvale, CA)
Assignee: Applied Materials, Inc.
H10P50/283H01J37/32449H01J37/32816H01J2237/182H01J2237/334
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Quick Facts
Patent No.
US 12690403
App. No.
18/203,404
Granted
Jul 21, 2026
Kind
B2
Abstract

Methods of semiconductor processing may include providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed on a substrate support within the processing region. A layer of silicon-and-nitrogen-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the hydrogen-containing precursor. The methods may include contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor. The contacting may etch a portion of the layer of silicon-and-nitrogen-containing material.

Claims (31)

1 . A semiconductor processing method comprising:

providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, and wherein a layer of silicon-and-nitrogen-containing material is disposed on the substrate;

forming plasma effluents of the hydrogen-containing precursor; and

contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor, wherein the contacting etches a portion of the layer of silicon-and-nitrogen-containing material, wherein the processing region is maintained halogen-free.

2 . The semiconductor processing method of claim 1 , wherein the hydrogen-containing precursor comprises diatomic hydrogen (H 2 ).

3 . The semiconductor processing method of claim 1 , wherein a layer of silicon-and-oxygen-containing material, a layer of silicon-containing material, or both are disposed on the substrate.

4 . The semiconductor processing method of claim 1 , further comprising:

providing an inert precursor with the hydrogen-containing precursor to the processing region.

5 . The semiconductor processing method of claim 4 , wherein a flow rate of the inert precursor is greater than a flow rate of the hydrogen-containing precursor.

6 . The semiconductor processing method of claim 1 , wherein the plasma effluents are formed at a plasma power of greater than or about 800 W.

7 . The semiconductor processing method of claim 1 , wherein the plasma effluents are formed at a plasma power of greater than or about 2,000 W.

8 . The semiconductor processing method of claim 1 , wherein the contacting forms silane (SiH 4 ), ammonia (NH 3 ), or both.

9 . The semiconductor processing method of claim 1 , wherein the substrate is characterized by a temperature of less than or about 50° C.

10 . The semiconductor processing method of claim 1 , wherein the substrate is characterized by a temperature of less than or about −25° C.

11 . The semiconductor processing method of claim 1 , wherein a pressure within the semiconductor processing chamber is maintained at less than or about 100 mTorr.

12 . The semiconductor processing method of claim 1 , wherein the contacting etches the layer of silicon-and-nitrogen-containing material at an etch rate of greater than or about 1 Å/min.

13 . A semiconductor processing method comprising:

providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, wherein a layer of silicon-and-oxygen-containing material is disposed on the substrate, and wherein a layer of silicon-and-nitrogen-containing material is disposed on the layer of silicon-and-oxygen-containing material;

forming plasma effluents of the hydrogen-containing precursor, wherein the plasma effluents are formed at a plasma power of greater than or about 1,000 W; and

contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor, wherein the contacting selectively etches a portion of the layer of silicon-and-nitrogen-containing material relative to the layer of silicon-and-oxygen-containing material.

14 . The semiconductor processing method of claim 13 , wherein the processing region is maintained halogen-free.

15 . The semiconductor processing method of claim 13 , wherein the substrate is characterized by a temperature of less than or about 50° C.

16 . A semiconductor processing method comprising:

providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, wherein a layer of silicon-and-oxygen-containing material is disposed on the substrate, and wherein a layer of silicon-and-nitrogen-containing material is disposed on the layer of silicon-and-oxygen-containing material;

forming plasma effluents of the hydrogen-containing precursor; and

contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor, wherein the contacting selectively etches a portion of the layer of silicon-and-nitrogen-containing material relative to the layer of silicon-and-oxygen-containing material, and wherein the substrate is characterized by a temperature of less than or about −50° C.

17 . The semiconductor processing method of claim 16 , further comprising:

providing helium with the hydrogen-containing precursor to the processing region.

18 . The semiconductor processing method of claim 16 , wherein the processing region is maintained halogen-free.

19 . The semiconductor processing method of claim 16 , wherein the plasma effluents are formed at a plasma power of greater than or about 1,000 W.

20 . The semiconductor processing method of claim 16 , wherein the contacting selectively etches the portion of the layer of silicon-and-nitrogen-containing material relative to the layer of silicon-and-oxygen-containing material at a selectivity of greater than or about 5:1.