IP Library Granted Patent US 12690426
Granted Patent B2
US 12690426 · App. 17/853,973 · Granted Jul 21, 2026

Semiconductor structure for detecting vertical electrical leakage

Inventor: Chun-Shun Huang (Taoyuan City, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H10P74/273H10P74/277
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Quick Facts
Patent No.
US 12690426
App. No.
17/853,973
Granted
Jul 21, 2026
Kind
B2
Abstract

A semiconductor testing structure is provided. The semiconductor testing structure includes a substrate, a first metal layer, a dielectric structure, and a second metal layer. The first metal layer is disposed on the substrate and includes a plurality of fingers extending along a first direction. The dielectric structure is disposed on the first metal layer. The second metal layer is disposed on the dielectric structure and electrically isolated from the first metal layer. The second metal layer extends along a second direction different from the first direction. The dielectric structure defines a sidewall extending between the first metal layer and the second metal layer.

Claims (12)

1 . A semiconductor testing structure, comprising:

a substrate;

a first metal layer comprising a plurality of fingers extending along a first direction;

a dielectric structure disposed on the first metal layer; and

a plurality of second metal layers extending along a second direction different from the first direction; and

a plurality of conductive layers disposed on the dielectric structure;

wherein the second metal layers are disposed on and in contact with the dielectric structure and are enclosed by the conductive layers and the dielectric structure;

wherein each of the conductive layers disposed on a lateral surface and an upper surface of each of the plurality of second metal layers;

wherein the dielectric structure comprises a first dielectric layer and a second dielectric layer over the first dielectric layer, wherein the second metal layers are enclosed by the conductive layers and second dielectric layer of the dielectric structure;

wherein the first dielectric layer comprises a connecting portion connecting the plurality of fingers, wherein the connecting portion extends along the second direction and at a same horizontal level of the plurality of fingers in order to connect ends of the plurality of fingers.

2 . The semiconductor testing structure of claim 1 , wherein a first portion of the second metal layer has a first pitch, and a second portion of the second metal layer has a second pitch different from the first pitch.

3 . The semiconductor testing structure of claim 1 , wherein the plurality of second metal layers has a first terminal electrically connected to a first conductive pad and a second terminal electrically connected to a second conductive pad.