Interconnection structure and method for manufacturing the same
An interconnection structure and a method of manufacturing an interconnection structure are provided. The interconnection structure includes a first dielectric layer, a second dielectric layer disposed on the first dielectric layer, and a first conductive layer disposed in the first dielectric layer. The interconnection structure also includes a conductive via electrically connected with the first conductive layer and extending through the first dielectric layer and the second dielectric layer. The conductive via has a first lateral surface surrounded by the first dielectric layer and a second lateral surface surrounded by the second dielectric layer. The first lateral surface and the second lateral surface have different slopes.
1 . An interconnection structure, comprising:
a first dielectric layer having a top surface and a first protruding portion protruding therefrom;
a second dielectric layer disposed on the first dielectric layer;
a first conductive layer disposed in the first dielectric layer; and
a conductive via electrically connected with the first conductive layer and extending through the first dielectric layer and the second dielectric layer;
wherein a greatest width of the conductive via is greater than 2.5 times a smallest width of the conductive via;
wherein the conductive via comprises:
a first lateral surface extended from the first conductive layer to the top surface of the first dielectric layer at the first protruding portion thereof; and
a second lateral surface extended from the top surface of the first dielectric layer at the first protruding portion thereof through the second dielectric layer.
2 . The interconnection structure of claim 1 , wherein the smallest width of the conductive via is less than 50.0 nm.
3 . The interconnection structure of claim 1 , wherein the greatest width of the conductive via is between 120.0 nm and 125.0 nm.
4 . The interconnection structure of claim 1 , wherein the greatest width of the conductive via is exposed from a third dielectric layer disposed on the second dielectric layer.
5 . The interconnection structure of claim 1 , wherein the first dielectric layer and the second dielectric layer have different etching rates with respect to an etchant.
6 . The interconnection structure of claim 1 , wherein the first conductive layer is partially covered by the first dielectric layer.
7 . The interconnection structure of claim 1 , further comprising:
a second conductive layer disposed in the first dielectric layer and spaced apart from the first conductive layer.
8 . The interconnection structure of claim 7 , wherein the first dielectric layer comprises a second protruding portion over the second conductive layer protruding into the second dielectric layer, wherein the first protruding portion and the second protruding portion are spaced apart from each other and are alignedly disposed over the first conductive layer and the second conductive layer respectively.
9 . The interconnection structure of claim 1 , wherein the conductive via further comprises a third lateral surface connected between the first lateral surface and the second lateral surface of the conductive via, and wherein the first lateral surface, the second lateral surface, and the third lateral surface have different slopes.
10 . The interconnection structure of claim 1 , wherein an electrical resistance of the conductive via is between 65.0 ohms and 70.0 ohms.
11 . The interconnection structure of claim 1 , wherein the conductive via comprises a barrier layer directly contacting the first dielectric layer and the second dielectric layer.
12 . The interconnection structure of claim 1 , wherein the first lateral surface and the second lateral surface of the conductive via have different slopes.