IP Library Granted Patent US 12690481
Granted Patent B2
US 12690481 · App. 17/403,560 · Granted Jul 21, 2026

Electronic device having a soldered joint between a metal region of a semiconductor die and a metal region of a substrate

Inventors: Kirill Trunov (Warstein, DE); Alexander Heinrich (Bad Abbach, DE); Konrad Roesl (Teublitz, DE); Arthur Unrau (Geseke, DE)
Assignee: Infineon Technologies Austria AG
H10W72/0198B23K1/0016B23K20/026H10W72/07255H10W72/2528H10W90/00H10W72/07331H10W72/07334H10W72/07336H10W72/07636
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Quick Facts
Patent No.
US 12690481
App. No.
17/403,560
Granted
Jul 21, 2026
Kind
B2
Abstract

An electronic device includes: a first semiconductor die having a metal region; a substrate having a plurality of metal regions; a first soldered joint between the metal region of the first semiconductor die and a first metal region of the substrate, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the first metal region of the substrate; and a second semiconductor die soldered to the first or different metal region of the substrate.

Claims (26)

1 . An electronic device, comprising:

a first semiconductor die having a metal region;

a substrate comprising a ceramic and a metal layer directly attached to the ceramic, wherein a plurality of metal regions is patterned into the metal layer;

a first soldered joint between the metal region of the first semiconductor die and the metal layer directly attached to the ceramic, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the metal layer directly attached to the ceramic, at least one of the intermetallic phases comprising metal consumed from the metal region of the first semiconductor die and at least one of the intermetallic phases comprising metal consumed from the metal layer directly attached to the ceramic, each of the intermetallic phases having a melting point above both a melting point of the solder preform and a soldering temperature at which the solder preform diffused into the metal region of the first semiconductor die and the metal layer directly attached to the ceramic; and

a second semiconductor die soldered to the metal layer directly attached to the ceramic.

2 . The electronic device of claim 1 , wherein a second soldered joint is formed between a metal region of the second semiconductor die and the metal layer directly attached to the ceramic, and wherein the second soldered joint has one or more intermetallic phases throughout the entire second soldered joint.

3 . The electronic device of claim 1 , wherein a second soldered joint is formed between a metal region of the second semiconductor die and the metal layer directly attached to the ceramic, and wherein the second soldered joint is devoid of intermetallic phases in a middle part of the second soldered joint.

4 . The electronic device of claim 1 , wherein a reflowed solder paste forms a second soldered joint between a metal region of the second semiconductor die and the metal layer directly attached to the ceramic.

5 . The electronic device of claim 4 , wherein the first semiconductor die is a power semiconductor die, and wherein the second semiconductor die is a passive semiconductor die or a logic semiconductor die.

6 . The electronic device of claim 1 , wherein the first semiconductor die has a different thickness than the second semiconductor die.

7 . The electronic device of claim 1 , wherein the first soldered joint laterally extends beyond one or more side faces of the first semiconductor die.

8 . The electronic device of claim 1 , further comprising a connector attached to the metal layer directly attached to the ceramic by:

a soldered joint having one or more intermetallic phases; or

a reflowed solder paste.

9 . The electronic device of claim 1 , further comprising a third semiconductor die attached to a side of the first or the second semiconductor die facing away from the substrate by:

a soldered joint having one or more intermetallic phases; or

a reflowed solder paste.

10 . The electronic device of claim 1 , further comprising a metal clip attached to a side of the first or the second semiconductor die facing away from the substrate by:

a soldered joint having one or more intermetallic phases; or

a reflowed solder paste.

11 . The electronic device of claim 1 , wherein the solder preform has a maximum thickness of 30 μm and a lower melting point than both the metal region of the first semiconductor die and the metal layer directly attached to the ceramic.

12 . An electronic device, comprising:

a first semiconductor die having a metal region;

a leadframe or metal clip; and

a first soldered joint between the metal region of the first semiconductor die and the leadframe or metal clip, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the leadframe or metal clip, at least one of the intermetallic phases comprising metal consumed from the metal region of the first semiconductor die and at least one of the intermetallic phases comprising metal consumed from the leadframe or metal clip, each of the intermetallic phases having a melting point above both a melting point of the solder preform and a soldering temperature at which the solder preform diffused into the metal region of the first semiconductor die and the leadframe or metal clip.

13 . The electronic device of claim 12 , wherein the leadframe or metal clip comprises Cu, Ni and/or Ag.