IP Library Granted Patent US 12690487
Granted Patent B2
US 12690487 · App. 18/333,184 · Granted Jul 21, 2026

Embedding an electronic component in a core of an integrated circuit substrate

Inventors: Jon Thomas Woodyard (Livermore, CA); Rahul Agarwal (Livermore, CA)
Assignee: Microsoft Technology Licensing, LLC
H10W74/114H10W70/635H10W70/6875H10W90/00H10D1/68
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Quick Facts
Patent No.
US 12690487
App. No.
18/333,184
Granted
Jul 21, 2026
Kind
B2
Abstract

Examples are provided that relate to embedding, in a core of a substrate, an electronic component having a thickness less than a thickness of the core. One example provides an electronic device comprising a substrate comprising a core and one or more buildup layers coupled with the core, each buildup layer comprising a metal layer and a dielectric layer. The core comprises a center comprising a plurality of plies, and an additional layer comprising one or more additional plies. The electronic device further comprises an electronic component embedded in at least one of the center or the additional layer of the core. The electronic component comprises a thickness less than a thickness of the core. The electronic device further comprises an integrated circuit die coupled with the substrate and electrically connected to the electronic component.

Claims (32)

1 . An electronic device, comprising:

a substrate comprising a core and one or more buildup layers coupled with the core, each buildup layer comprising a metal layer and a dielectric layer, the core comprising

a center comprising a plurality of plies,

an additional layer comprising one or more additional plies;

an electronic component embedded in at least one of the center or the additional layer of the core and aligned with a capture pad of the center of the core, the capture pad being located between plated through hole vias in the center of the core, the electronic component comprising an integrated passive device and a thickness less than a thickness of the core; and

an integrated circuit die coupled with the substrate and electrically connected to the electronic component.

2 . The electronic device of claim 1 , wherein the electronic component is embedded in the center of the core.

3 . The electronic device of claim 2 , wherein the electronic component is electrically connected to the one or more buildup layers using a via in the additional layer.

4 . The electronic device of claim 1 , wherein the electronic component is embedded in the additional layer of the core.

5 . The electronic device of claim 4 , wherein the electronic component is a first electronic component, and the electronic device further comprises a second electronic component embedded in a second additional layer of the core.

6 . The electronic device of claim 5 , wherein the second electronic component is located on an opposite side of the center than the first electronic component.

7 . The electronic device of claim 4 , further comprising a dummy component located on an opposite side of the center than the electronic component.

8 . An electronic device, comprising:

a substrate comprising a core and one or more buildup layers coupled with the core, each buildup layer comprising a metal layer and a dielectric layer, the core comprising

a center comprising a plurality of plies, and

an additional layer coupled to the center, the additional layer comprising one or more additional plies;

an electronic component embedded in the center and aligned with a capture pad of the center of the core, the capture pad being located between plated through hole vias in the center of the core, the electronic component comprising an integrated passive device and a thickness less than a thickness of the core; and

an integrated circuit die coupled with the substrate and electrically connected to the electronic component.

9 . The electronic device of claim 8 , wherein the additional layer is a first additional layer, and further comprising a second additional layer coupled to a side of the center opposite of the first additional layer, the second additional layer comprising one or more additional plies.

10 . The electronic device of claim 9 , wherein the electronic component is thermally coupled to a surface of the substrate using one or more thermal vias.

11 . The electronic device of claim 8 , wherein the electronic component is electrically connected to the one or more of the buildup layers using a via through the additional layer.

12 . An electronic device, comprising:

a substrate comprising a core and one or more buildup layers coupled with the core, each buildup layer comprising a metal layer and a dielectric layer, the core comprising

a center comprising a plurality of plies, plated through hole vias, and a capture pad located between the plated through hole vias, and

an additional layer coupled to the center, the additional layer comprising one or more additional plies;

an electronic component embedded in the additional layer and aligned with the capture pad of the center of the core, the electronic component comprising a thickness less than a thickness of the core; and

an integrated circuit die coupled with the substrate and electrically connected to the electronic component.

13 . The electronic device of claim 12 , wherein the additional layer is a first additional layer, and further comprising a second additional layer coupled to a side of the center opposite of the first additional layer, the second additional layer comprising one or more additional plies.

14 . The electronic device of claim 13 , wherein the electronic component is a first electronic component, and the electronic device further comprises a second electronic component embedded in the second additional layer of the core.

15 . The electronic device of claim 14 , wherein the second electronic component is located on an opposite side of the core than the first electronic component.

16 . The electronic device of claim 13 , further comprising a dummy component located on an opposite side of the center than the electronic component.

17 . The electronic device of claim 12 , wherein the electronic component comprises one or more of an integrated passive device, a multilayer ceramic capacitor, or a capacitive array.