IP Library Granted Patent US 12691450
Granted Patent B2
US 12691450 · App. 17/753,101 · Granted Jul 28, 2026

Microfluidic substrate, microfluidic chip and manufacturing method thereof

Inventors: Ruijun Deng (Beijing, CN); Zhukai Liu (Beijing, CN); Ding Ding (Beijing, CN); Haonan Liu (Beijing, CN)
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
B01L7/52B01L3/502707B01L2300/12B01L2300/1827
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Quick Facts
Patent No.
US 12691450
App. No.
17/753,101
Granted
Jul 28, 2026
Kind
B2
Abstract

The present disclosure provides a microfluidic substrate, a microfluidic chip and a manufacturing method thereof. The microfluidic substrate includes: a first substrate; a conductive layer on the first substrate; and a defining layer on a side of the conductive layer facing away from the first substrate, the defining layer defining a concave portion; wherein the conductive layer comprises a plurality of conductive patterns corresponding to the concave portion, the plurality of conductive patterns are arranged along a first direction, each conductive pattern extends along a second direction and comprises a first end and a second end, the first direction is perpendicular to the second direction, and each conductive pattern has a maximum local resistance value at the first end and the second end of the conductive pattern.

Claims (35)

1 . A microfluidic substrate, comprising:

a first substrate;

a conductive layer on the first substrate;

a defining layer on a side of the conductive layer facing away from the first substrate, the defining layer defining a concave portion;

a wiring between the conductive layer and the first substrate; and

a passivation layer between the wiring and the conductive layer,

wherein the conductive layer comprises a plurality of conductive patterns corresponding to the concave portion, the plurality of conductive patterns are arranged along a first direction, each conductive pattern extends along a second direction and comprises a first end and a second end, the first direction is perpendicular to the second direction, and each conductive pattern has a maximum local resistance value at the first end and the second end of the conductive pattern, the passivation layer comprises a through hole; the conductive layer is electrically connected to the wiring via the through hole.

2 . The microfluidic substrate according to claim 1 , wherein the conductive layer has a uniform thickness, each conductive pattern has a midpoint in the second direction, and each conductive pattern has a maximum width along the first direction at the midpoint.

3 . The microfluidic substrate according to claim 2 , wherein each conductive pattern has a minimum width along the first direction at the first end and the second end of the conductive pattern.

4 . The microfluidic substrate according to claim 2 , wherein each conductive pattern has a width that changes continuously along the second direction.

5 . The microfluidic substrate according to claim 4 , wherein each conductive pattern has linear sides.

6 . The microfluidic substrate according to claim 4 , wherein each conductive pattern has curvilinear sides.

7 . The microfluidic substrate according to claim 2 , wherein each conductive pattern has a width that changes discontinuously along the second direction.

8 . The microfluidic substrate according to claim 1 , wherein each conductive pattern has an axisymmetric shape, and a symmetry axis of the axisymmetric shape is parallel to the second direction.

9 . The microfluidic substrate according to claim 1 , wherein each conductive pattern has a minimum thickness at the first end and the second end of the conductive pattern.

10 . The microfluidic substrate according to claim 1 , wherein an overall resistance value between the first end and the second end of each conductive pattern decreases as a distance between the conductive pattern and a center of the concave portion increases.

11 . The microfluidic substrate according to claim 1 , wherein the conductive layer has a uniform thickness, and a width of each conductive pattern in the first direction increases as a distance between the conductive pattern and a center of the concave portion increases.

12 . The microfluidic substrate according to claim 1 , wherein the plurality of conductive patterns has a same length in the second direction.

13 . The microfluidic substrate according to claim 1 , wherein the plurality of conductive patterns constitute a parallel circuit, and a current path of each conductive pattern is along the second direction.

14 . The microfluidic substrate according to claim 1 , wherein the first substrate is a glass substrate.

15 . The microfluidic substrate according to claim 1 , wherein a material of the conductive layer comprises at least one of indium tin oxide and indium zinc oxide.

16 . The microfluidic substrate according to claim 1 , wherein the wiring comprises a Mo—AlNd—Mo alloy layer.

17 . A microfluidic chip, comprising:

the microfluidic substrate according to claim 1 ;

a counter substrate on a side of the defining layer facing away from the first substrate; and

a sealant on the periphery of the concave portion, the sealant defining a chamber.

18 . The microfluidic chip according to claim 17 , wherein the chamber is a reaction chamber, and the counter substrate comprises a sample inlet and a sample outlet.

19 . A method for manufacturing a microfluidic chip, comprising:

providing a first substrate;

forming a wiring on the first substrate;

forming a passivation layer comprising a through hole on the wiring;

forming a conductive layer on the passivation layer and patterning the conductive layer;

forming a defining layer on a side of the conductive layer facing away from the first substrate, the defining layer defining a concave portion, the conductive layer comprising a plurality of conductive patterns corresponding to the concave portion, the plurality of conductive patterns being arranged along a first direction, each conductive pattern extending along a second direction and comprising a first end and a second end, the first direction being perpendicular to the second direction, each conductive pattern having a maximum local resistance value at the first end and the second end of the conductive pattern, and the conductive layer being electrically connected to the wiring via the through hole;

arranging a sealant on the periphery of the concave portion, the sealant defining a chamber; and

arranging a counter substrate on a side of the defining layer facing away from the first substrate.