Charge loss mitigation through dynamic programming sequence

1 . A method comprising:

receiving a program command specifying new data to be programmed to a memory device;

partitioning the new data into a plurality of data partitions;

identifying a wordline addressing a set of memory cells to be programmed with a data partition of the plurality of data partitions;

for each data partition of the plurality of data partitions, producing a plurality of expected data state metrics by determining a respective expected data state metric exhibited by the set of memory cells of the identified wordline programmed with the data partition;

identifying a data partition associated with a lowest expected data state metric among the plurality of expected data state metrics; and

programming the identified data partition to the set of memory cells.

2 . The method of claim 1 , wherein the plurality of data partitions is sequentially ordered across a plurality of blocks distributed across the memory device.

3 . The method of claim 1 , wherein producing the plurality of expected data state metrics comprises:

reading existing data stored by a set of memory cells addressable by a preceding wordline;

obtaining a plurality of threshold voltages associated with the preceding wordline;

for each data partition of the plurality of data partitions, determining a plurality of threshold voltages for programming a respective data partition; and

obtaining, using a pre-computed lateral charge loss data structure, an expected data state metric exhibited by each memory cell of the set of memory cells if programmed with the respective data partition and the preceding wordline previously programmed with existing data.

4 . The method of claim 1 , further comprising:

responsive to programming the identified data partition to the set of memory cells, storing, in an entry of a programming sequence data structure, a block identifier associated with the respective block.

5 . The method of claim 4 , wherein the block identifier indicates a logical unit and a plane in which the respective block is located.

6 . The method of claim 1 , wherein the expected data state metric is a bit error count.

7 . The method of claim 1 , further comprising:

receiving a read command directed to a target wordline;

responsive to determining that the target wordline is a first wordline, reading the target wordline of each block of a plurality of blocks sequentially.

8 . A system comprising:

a memory device, and

a processing device, operatively coupled with the memory device, to perform operations comprising:

receiving a program command specifying new data to be programmed to a memory device;

partitioning the new data into a plurality of data partitions;

identifying a wordline addressing a set of memory cells to be programmed with a data partition of the plurality of data partitions;

for each data partition of the plurality of data partitions, producing a plurality of expected data state metrics by determining a respective expected data state metric exhibited by the set of memory cells of the identified wordline programmed with the data partition;

identifying a data partition associated with a lowest expected data state metric among the plurality of expected data state metrics; and

programming the identified data partition to the set of memory cells.

9 . The system of claim 8 , wherein the plurality of data partitions is sequentially ordered across a plurality of blocks distributed across the memory device.

10 . The system of claim 8 , wherein producing the plurality of expected data state metrics comprises:

reading existing data stored by a set of memory cells addressable by a preceding wordline;

obtaining a plurality of threshold voltages associated with the preceding wordline;

for each data partition of the plurality of data partitions, determining a plurality of threshold voltages for programming a respective data partition; and

obtaining, using a pre-computed lateral charge loss data structure, an expected data state metric exhibited by each memory cell of the set of memory cells if programmed with the respective data partition and the preceding wordline previously programmed with existing data.

11 . The system of claim 8 , wherein the processing device is to perform operations further comprising:

responsive to programming the identified data partition to the set of memory cells, storing, in an entry of a programming sequence data structure, a block identifier associated with the respective block.

12 . The system of claim 11 , wherein the block identifier indicates a logical unit and a plane in which the respective block is located.

13 . The system of claim 8 , wherein the expected data state metric is a bit error count.

14 . The system of claim 8 , wherein the processing device is to perform operations further comprising:

receiving a read command directed to a target wordline;

responsive to determining that the target wordline is a first wordline, reading the target wordline of each block of a plurality of blocks sequentially.

15 . A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving a program command specifying new data to be programmed to a memory device;

partitioning the new data into a plurality of data partitions;

identifying a wordline addressing a set of memory cells to be programmed with a data partition of the plurality of data partitions;

for each data partition of the plurality of data partitions, producing a plurality of expected data state metrics by determining a respective expected data state metric exhibited by the set of memory cells of the identified wordline programmed with the data partition;

identifying a data partition associated with a lowest expected data state metric among the plurality of expected data state metrics; and

programming the identified data partition to the set of memory cells.

16 . The non-transitory computer-readable storage medium of claim 15 , wherein the plurality of data partitions is sequentially ordered across a plurality of blocks distributed across the memory device.

17 . The non-transitory computer-readable storage medium of claim 15 , wherein producing the plurality of expected data state metrics comprises:

reading existing data stored by a set of memory cells addressable by a preceding wordline;

obtaining a plurality of threshold voltages associated with the preceding wordline;

for each data partition of the plurality of data partitions, determining a plurality of threshold voltages for programming a respective data partition; and

obtaining, using a pre-computed lateral charge loss data structure, an expected data state metric exhibited by each memory cell of the set of memory cells if programmed with the respective data partition and the preceding wordline previously programmed with existing data.

18 . The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is to perform operations further comprising:

responsive to programming the identified data partition to the set of memory cells, storing, in an entry of a programming sequence data structure, a block identifier associated with the respective block.

19 . The non-transitory computer-readable storage medium of claim 18 , wherein the block identifier indicates a logical unit and a plane in which the respective block is located.

20 . The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is to perform operations further comprising:

receiving a read command directed to a target wordline;

responsive to determining that the target wordline is a first wordline, reading the target wordline of each block of a plurality of blocks sequentially.