Methods and apparatus to provide register information of semiconductor chips

1 . A method comprising:

accessing, by storage interface circuitry, chip information, the chip information corresponding to a semiconductor chip;

removing, by at least one processor circuit, redundant information from the chip information to generate deduplicated chip information;

classifying, by the at least one processor circuit, the deduplicated chip information into first classified chip information and second classified chip information, the first classified chip information corresponding to a first access permission, the second classified chip information corresponding to a second access permission, the first classified chip information including information about a first number of registers in the semiconductor chip, the second classified chip information including information about a second number of registers in the semiconductor chip, the second classified chip information indicative of access to information about a subset of the first number of registers, the second number of registers being the subset of the first number of registers; and

causing, by the at least one processor circuit, storing of the first classified chip information in a first classified file in memory and the second classified chip information in a second classified file in the memory.

2 . The method of claim 1 , wherein the chip information includes register information corresponding to a plurality of registers of the semiconductor chip.

3 . The method of claim 1 , further comprising:

accessing the first classified chip information in the first classified file based on an access permission associated with a user identifier; and

preventing access to the second classified chip information in the second classified file based on the user identifier.

4 . The method of claim 1 , further comprising:

applying a first level filter and a second level filter to the first classified chip information.

5 . The method of claim 4 , further comprising filtering intellectual property (IP) cores of the semiconductor chip in the first classified chip information based on the first level filter.

6 . The method of claim 5 , further comprising filtering regions of the semiconductor chip in the first classified chip information based on the second level filter.

7 . The method of claim 6 , further comprising:

applying an instance filter to the first classified chip information, the instance filter to identify a plurality of circuit instances represented in the first classified chip information;

applying a register filter to the first classified chip information, the register filter to identify registers corresponding to a first circuit instance of the circuit instances; and

causing a user interface to display the plurality of circuit instances and to display the registers corresponding to the first circuit instance.

8 . The method of claim 1 , wherein the accessing of the chip information includes accessing the chip information in a JavaScript Object Notation (JSON) file.

9 . The method of claim 1 , further comprising preventing access to information of a portion of the first number of registers by providing access to the second classified file.

10 . An apparatus comprising:

memory;

machine-readable instructions in the memory; and

at least one processor circuit to be programmed by the machine-readable instructions to:

select a file from one of a first or second classified file based on a user, the first classified file including information about a first number of registers, the second classified file including information about a second number of registers, the second file indicative of access to information about a subset of the first number of registers, the second number of registers being the subset of the first number of registers;

apply a first filter to information in the file based on a first user selection of one of first names in a first graphical user interface (GUI) selection control of a GUI;

apply a second filter to the information in the file based on a second user selection of one of second names in a second GUI selection control of the GUI; and

provide register information to display in an information view section of the GUI based on a third user selection of one of third names in a third GUI selection control of the GUI.

11 . The apparatus of claim 10 , wherein one or more of the at least one processor circuit is to:

access first classified chip information in the file based on an access permission associated with a user identifier; and

prevent access to second classified chip information in a second file based on the user identifier.

12 . The apparatus of claim 10 , wherein the first names are semiconductor chip device names, the second names are intellectual property core names, the third names are register names, and the information view section is a register information view section to display descriptions of registers of semiconductor chip devices.

13 . The apparatus of claim 10 , wherein the at least one processor circuit is in a client device, the machine-readable instructions to cause one or more of the at least one processor circuit to apply the first and second filters in the client device.

14 . The apparatus of claim 10 , wherein the at least one processor circuit is in a server, the machine-readable instructions to cause one or more of the at least one processor circuit to:

apply the first and second filters in the server; and

provide the first, second, and third names to a client device via a network.

15 . An apparatus comprising:

memory;

machine-readable instructions in the memory;

a display; and

at least one processor circuit coupled to the memory and to the display, the at least one processor circuit to be programmed by the machine-readable instructions to:

obtain one of a first or second file based on a user, the first file including information about a first number of registers, the second file including information about a second number of registers, the second second file indicative of access to information about a subset of the first number of registers, the second number of registers being the subset of the first number of registers;

instruct the display to show first names in a first graphical user interface (GUI) selection control of a GUI;

based on a first user selection of one of the first names, apply a first filter to information in the obtained file;

based on the first filter, instruct the display to show second names in a second GUI selection control of the GUI;

based on a second user selection of one of the second names, apply a second filter to the information in the file;

based on the second filter, instruct the display to show third names in a third GUI selection control of the GUI; and

based on a third user selection of one of the third names, instruct the display to show register information in an information view section of the GUI.

16 . The apparatus of claim 15 , wherein the first names are semiconductor chip device names, the second names are intellectual property core names, the third names are register names, and the information view section is a register information view section to present descriptions of registers of semiconductor chip devices.

17 . The apparatus of claim 15 , wherein the first filter corresponds to a first hierarchy level of a filter hierarchy tree, the second filter corresponding to a second hierarchy level of the filter hierarchy tree.

18 . The apparatus of claim 15 , wherein one or more of the at least one processor circuit is to:

instruct the display to show the first, second, and third GUI selection controls in a filter section of the GUI; and

instruct the display to show a parametric search field in the GUI.

19 . The apparatus of claim 15 , wherein one or more of the at least one processor circuit is to:

receive a parametric search request from the GUI;

perform a parametric search on the information in the file based on user-provided search text, the user-provided search text from a parametric search field in the GUI; and

instruct the display to show a result of the parametric search in the information view section of the GUI.

20 . The apparatus of claim 15 , wherein the at least one processor circuit is in a client device, one or more of the at least one processor circuit to apply the first and second filters in the client device.

21 . The apparatus of claim 15 , wherein the at least one processor circuit is in a server, one or more of the at least one processor circuit to:

apply the first and second filters in the server; and

provide the first, second, and third names to a client device via a network.