IP Library Granted Patent US 12694503
Granted Patent B2
US 12694503 · App. 18/476,559 · Granted Jul 28, 2026

Contour extraction of images with selection-based auto tuning

Inventors: Germain Louis Fenger (Gladstone, OR); Hsin-Wei Wu (Heverlee, BE); Kiarash Ahi (San Jose, CA)
Assignee: Siemens Industry Software Inc.
G06T7/0008G06T7/11G06T7/194G06V10/46G06V10/764G06T2207/10061G06T2207/30148
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Quick Facts
Patent No.
US 12694503
App. No.
18/476,559
Filed
Sep 28, 2023
Granted
Jul 28, 2026
Kind
B2
Art Unit
2672
USPC
382/141
Abstract

A computing system can obtain wafer images of integrated circuitry having physical structures and classify each of the wafer images based on image characteristics of the wafer images. The computing system can partition each of the wafer images into a plurality of blocks, analyze each of the blocks to determine which of the blocks correspond to a background portion or a contour portion of the wafer images, assign an image score to each wafer image based on the analysis of each of the blocks, and classify the wafer images based on the image scores assigned to the wafer images. The computing system can set parameters for contour extraction using at least one of the wafer images selected from each of the classifications of the wafer images, and extract contours corresponding to the physical structures of the integrated circuitry from the wafer images based, at least in part, on the parameters.

Claims (49)

1 . A method comprising:

obtaining, by a computing system, wafer images of integrated circuitry having physical structures;

classifying, by the computing system, each of the wafer images into bins based on image characteristics of the wafer images;

selecting, by the computing system, at least one of the wafer images from each of the bins;

aggregating, by the computing system, the selected wafer images into representative images, which correspond to training data for a machine-learning algorithm implemented by the computing system;

setting, by the machine-learning algorithm implemented by the computing system, parameters for contour extraction using the representative images; and

extracting, by the computing system, contours corresponding to the physical structures of the integrated circuitry from the wafer images based, at least in part, on the parameters.

2 . The method of claim 1 , wherein classifying each of the wafer images based on the image characteristics of the wafer images further comprises:

partitioning each of the wafer images into a plurality of blocks;

analyzing each of the blocks to determine which of the blocks correspond to a background portion of the corresponding wafer image and which of the blocks correspond to a contour portion of the corresponding wafer image; and

assigning an image score to each wafer image based on the analysis of each of the blocks, wherein the classifying each of the wafer images is based on the image scores assigned to the wafer images.

3 . The method of claim 2 , wherein analyzing each of the blocks to determine whether the blocks correspond to the background portion of the corresponding wafer images or the contour portion of the corresponding wafer images further comprises:

calculating a standard deviation of the pixels of the wafer images within each of the blocks; and

determining whether the blocks correspond to the background portion of the corresponding wafer image or the contour portion of the wafer image based on the standard deviation relative to a threshold deviation value.

4 . The method of claim 2 , wherein the classifying each of the wafer images into bins further comprises binning the wafer images into different groups based on the image scores of the corresponding wafer images.

5 . The method of claim 1 , wherein the wafer images correspond to scanning electron microscope (SEM) images of manufactured integrated circuitry.

6 . A system comprising:

a memory system configured to store computer-executable instructions; and

a computing system, in response to execution of the computer-executable instructions, is configured to:

obtain wafer images of integrated circuitry having physical structures;

classify each of the wafer images based on image characteristics of the wafer images;

select at least one of the wafer images from each of the bins;

aggregate the selected wafer images into representative images, which correspond to training data for a machine-learning algorithm implemented by the computing system;

set, by the machine-learning algorithm implemented by the computing system, parameters for contour extraction using the representative images; and

extract contours corresponding to the physical structures of the integrated circuitry from the wafer images based, at least in part, on the parameters.

7 . The system of claim 6 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to classify each of the wafer images based on the image characteristics of the wafer images by:

partitioning each of the wafer images into a plurality of blocks;

analyzing each of the blocks to determine which of the blocks correspond to a background portion of the corresponding wafer image and which of the blocks correspond to a contour portion of the corresponding wafer image; and

assigning an image score to each wafer image based on the analysis of each of the blocks, wherein the classifying each of the wafer images is based on the image scores assigned to the wafer images.

8 . The system of claim 7 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to analyze each of the blocks to determine whether the blocks correspond to the background portion of the corresponding wafer images or the contour portion of the corresponding wafer images by:

calculating a standard deviation of the pixels of the wafer images within each of the blocks; and

determining whether the blocks correspond to the background portion of the corresponding wafer image or the contour portion of the wafer image based on the standard deviation relative to a threshold deviation value.

9 . The system of claim 7 , wherein the computing system, in response to execution of the computer-executable instructions, is further configured to classify each of the wafer images into bins by binning the wafer images into different groups based on the image scores of the corresponding wafer images.

10 . An apparatus comprising at least one computer-readable memory device storing instructions configured to cause one or more processing devices to perform operations comprising:

obtaining wafer images of integrated circuitry having physical structures;

classifying each of the wafer images based on image characteristics of the wafer images;

selecting at least one of the wafer images from each of the bins;

aggregating the selected wafer images into representative images, which correspond to training data for a machine-learning algorithm implemented by the computing system;

setting, by the machine-learning algorithm implemented by the one or more processing devices, parameters for contour extraction using the representative images; and

extracting contours corresponding to the physical structures of the integrated circuitry from the wafer images based, at least in part, on the parameters.

11 . The apparatus of claim 10 , wherein classifying each of the wafer images based on the image characteristics of the wafer images further comprises:

partitioning each of the wafer images into a plurality of blocks;

analyzing each of the blocks to determine which of the blocks correspond to a background portion of the corresponding wafer image and which of the blocks correspond to a contour portion of the corresponding wafer image; and

assigning an image score to each wafer image based on the analysis of each of the blocks, wherein the classifying each of the wafer images is based on the image scores assigned to the wafer images.

12 . The apparatus of claim 11 , wherein analyzing each of the blocks to determine whether the blocks correspond to the background portion of the corresponding wafer images or the contour portion of the corresponding wafer images further comprises:

calculating a standard deviation of the pixels of the wafer images within each of the blocks; and

determining whether the blocks correspond to the background portion of the corresponding wafer image or the contour portion of the wafer image based on the standard deviation relative to a threshold deviation value.

13 . The apparatus of claim 11 , wherein the classifying each of the wafer images into bins further comprises binning the wafer images into different groups based on the image scores of the corresponding wafer images.

14 . The apparatus of claim 10 , wherein the wafer images correspond to scanning electron microscope (SEM) images of manufactured integrated circuitry.