Pixel circuits for light emitting elements

1 . A pixel driving circuit, comprising:

a first transistor configured to receive a data signal and drive a light emitting element based on the data signal, the first transistor comprising a first gate terminal, a first source terminal, and a first drain terminal;

a second transistor comprising a second gate terminal receiving a first bias signal from a first bias source, a second source terminal coupled to the first transistor, and a second drain terminal coupled to the light emitting element;

a first capacitor disposed between the first gate terminal and the second gate terminal, wherein the first transistor and the second transistor are different types of transistors;

a driving sub-circuit coupled to the first gate terminal and the first drain terminal to selectively provide a second bias signal by a third bias source to the first transistor; and

a data-writing sub-circuit coupled to the driving sub-circuit to selectively provide the data signal to the first transistor; and

a second capacitor disposed between the driving sub-circuit and the data-writing sub-circuit, wherein the second capacitor is selectively coupled to the first gate terminal and the first drain terminal through the driving sub-circuit.

2 . The pixel driving circuit of claim 1 , wherein a scan period of each display frame comprises a reset period and a light emitting period, the driving sub-circuit provides the second bias signal to the first transistor during the light emitting period to drive the light emitting element.

3 . The pixel driving circuit of claim 2 , wherein the reset period comprises an initialization period, a compensation period, and a data writing period, the driving sub-circuit provides a first initialization bias signal to the first capacitor during the initialization period.

4 . The pixel driving circuit of claim 3 , wherein the data-writing sub-circuit provides a second initialization bias signal to the second capacitor during the initialization period and the compensation period.

5 . The pixel driving circuit of claim 3 , wherein the data-writing sub-circuit provides the data signal to the first transistor during the data writing period.

6 . The pixel driving circuit of claim 1 , wherein the driving sub-circuit comprises:

a first switch element disposed between the first drain terminal and a first terminal of the second capacitor;

a second switch element disposed between the first terminal of the second capacitor and the third bias source; and

a third switch element disposed between the first terminal of the second capacitor and the first gate terminal.

7 . The pixel driving circuit of claim 1 , wherein the driving sub-circuit comprises:

a sixth switch element disposed between the first source terminal and the third bias source;

a seventh switch element disposed between the first source terminal and a first terminal of the second capacitor; and

an eighth switch element disposed between the first terminal of the second capacitor and a first initialization bias source.

8 . The pixel driving circuit of claim 1 , wherein the driving sub-circuit comprises:

a ninth switch element disposed between the first source terminal and the third bias source;

a tenth switch element disposed between the first source terminal and a first terminal of the second capacitor; and

an eleventh switch element disposed between the first terminal of the second capacitor and the first gate terminal.

9 . The pixel driving circuit of claim 1 , wherein the data-writing sub-circuit comprises:

a twelfth switch element disposed between a second terminal of the second capacitor and a data signal source; and

a thirteenth switch element disposed between the second terminal of the second capacitor and a second initialization bias source.

10 . The pixel driving circuit of claim 1 , wherein the data-writing sub-circuit and the second capacitor are shared by more than one driving sub-circuit.

11 . The pixel driving circuit of claim 1 , wherein the first bias source and a second bias source are provided by different voltage sources.

12 . The pixel driving circuit of claim 1 , wherein the first bias source and a second bias source are provided by a same voltage source.

13 . A light emitting device, comprising:

a light emitting element; and

a driving circuit for driving the light emitting element, the driving circuit comprising:

a first type transistor receiving a data signal and comprising a first gate terminal, a first source terminal, and a first drain terminal;

a second type transistor comprising a second gate terminal receiving a first bias signal from a first bias source, a second source terminal coupled to the first drain terminal, and a second drain terminal coupled to the light emitting element;

a first capacitor disposed between the first gate terminal and the second gate terminal;

a driving sub-circuit coupled to the first gate terminal and the first source terminal to provide the data signal and a third bias signal by a third bias source;

a data-writing sub-circuit coupled to the driving sub-circuit to provide the data signal to the driving sub-circuit; and

a second capacitor disposed between the driving sub-circuit and the data-writing sub-circuit, wherein the second capacitor is selectively coupled to the first gate terminal and the first drain terminal through the driving sub-circuit.

14 . The light emitting device of claim 13 wherein the first type transistor is a p-type transistor, and the second type transistor is an n-type transistor.

15 . A method for driving a light emitting element by a pixel circuit, wherein the pixel circuit comprises a first transistor, a second transistor disposed between the first transistor and the light emitting element, a first capacitor disposed between a first gate terminal of the first transistor and a second gate terminal of the second transistor, and a second capacitor comprising a second end connecting disposed between the first transistor and a first end connecting a data signal source, the method comprising:

during an initialization period, initializing a first end of the first capacitor to a first initialization bias and initializing a first end of the second capacitor to a second initialization bias;

during a compensation period, compensating the first end of the first capacitor to a compensation bias;

during a data writing period, providing a data signal to the first end of the second capacitor; and

during an emitting period, driving the light emitting element to emit based on the data signal.

16 . The method of claim 15 , wherein the pixel circuit further comprises a reset bias source coupled to the second transistor and the light emitting element, and the method further comprises:

during the initialization period, the compensation period, and the data writing period, providing a reset bias to the pixel circuit by the reset bias source.

17 . The method of claim 15 , wherein a sum of the initialization period, the compensation period, the data writing period, and the emitting period is a frame period.

18 . The method of claim 16 , wherein initializing the first end of the first capacitor to the first initialization bias and initializing the first end of the second capacitor to the second initialization bias, comprises:

providing the first initialization bias to the first end of the first capacitor;

providing a first bias to a second end of the first capacitor;

providing the second initialization bias to the first end of the second capacitor; and

coupling the first end of the first capacitor and a second end of the second capacitor.

19 . The method of claim 18 , wherein compensating the first end of the first capacitor to the compensation bias, comprises:

discharging the first initialization bias at the first end of the first capacitor through the first transistor and the second transistor to the reset bias.