Display panel comprising pixel circuit and display apparatus

1 . A display panel comprising:

a plurality of light-emitting elements, at least one of which comprises a first light-emitting element and a second light-emitting element with different emission colors; and

a plurality of pixel circuits, at least one of which comprises an amplitude modulation subcircuit and a pulse width modulation subcircuit, the pixel circuits comprising a first pixel circuit configured to drive the first light-emitting element and comprising a first target transistor, and a second pixel circuit configured to drive the second light-emitting element and comprising a second target transistor with a same function as that of the first target transistor and a different width-to-length ratio from that of the first target transistor;

wherein the first pixel circuit comprises the amplitude modulation subcircuit which comprises a first driving transistor, the second pixel circuit comprises the amplitude modulation subcircuit which comprises a second driving transistor, the first pixel circuit comprises the pulse width modulation subcircuit which comprises a third driving transistor, the second pixel circuit comprises the pulse width modulation subcircuit which comprises a fourth driving transistor;

the first target transistor comprises the first driving transistor, and the second target transistor comprises the second driving transistor; or the first target transistor comprises the third driving transistor, and the second target transistor comprises the fourth driving transistor;

a width-to-length ratio of the first driving transistor is greater than that of the second driving transistor, and/or a width-to-length ratio of the third driving transistor is greater than that of the fourth driving transistor; and

the width-to-length ratio of the first driving transistor is greater than that of the third driving transistor, and/or the width-to-length ratio of the second driving transistor is greater than that of the fourth driving transistor.

2 . The display panel according to claim 1 , wherein the amplitude modulation subcircuit of the first pixel circuit comprises a first storage capacitor, the amplitude modulation subcircuit in the second pixel circuit comprises a second storage capacitor; the pulse width modulation subcircuit of the first pixel circuit comprises a third storage capacitor, and the pulse width modulation subcircuit in the second pixel circuit comprises a fourth storage capacitor;

wherein a capacitance value of the first storage capacitor is greater than that of the second storage capacitor, and/or a capacitance value of the third storage capacitor is greater than that of the fourth storage capacitor.

3 . The display panel according to claim 2 , wherein a difference between the capacitance value of the first storage capacitor and the capacitance value of the second storage capacitor is ΔC1, a difference between the capacitance value of the third storage capacitor and the capacitance value of the fourth storage capacitor is ΔC2, and ΔC1>ΔC2.

4 . The display panel according to claim 1 , wherein the amplitude modulation subcircuit of the first pixel circuit comprises a first control transistor, and the pulse width modulation subcircuit of the first pixel circuit is connected to a gate of the first control transistor;

wherein the amplitude modulation subcircuit in the second pixel circuit comprises a second control transistor, and the pulse width modulation subcircuit of the second pixel circuit is connected to a gate of the second control transistor;

wherein the first target transistor comprises the first control transistor, and the second target transistor comprises the second control transistor; and

wherein a width-to-length ratio of the first control transistor is greater than that of the second control transistor.

5 . The display panel according to claim 4 ,

wherein a ratio of a width-to-length ratio of the first driving transistor to that of the second driving transistor is B1, a ratio of a width-to-length ratio of the third driving transistor to that of the fourth driving transistor is B2, a ratio of the width-to-length ratio of the first control transistor to that of the second control transistor is B3, and B3=B1, or B3=B2.

6 . The display panel according to claim 4 , wherein the pulse width modulation subcircuit of the first pixel circuit comprises a first control capacitor, and the first control capacitor is connected to a gate of the first control transistor;

wherein the pulse width modulation subcircuit of the second pixel circuit comprises a second control capacitor connected to a gate of the second control transistor; and

wherein a capacitance value of the first control capacitor is greater than that of the second control capacitor.

7 . The display panel according to claim 1 , wherein a channel length of the first target transistor is equal to that of the second target transistor, and a channel width of the first target transistor is not equal to that of the second target transistor.

8 . The display panel according to claim 1 , wherein the first target transistor comprises n1 first transistors connected in parallel, and the second target transistor comprises n2 second transistors connected in parallel, where n1 and n2 are integers greater than 1;

wherein a channel length of each first transistor is L1, and a channel width of each first transistor is W1;

a channel length of each second transistor is L2, and a channel width of each second transistor is W2.

9 . The display panel according to claim 8 , wherein W1=W2, n1≠n2; or W1 W2, n1=n2, and L1=L2.

10 . The display panel according to claim 1 , wherein the first light-emitting element comprises a red light-emitting element, and the second light-emitting element comprises at least one of a blue light-emitting element or a green light-emitting element; or

the first light-emitting element comprises at least one of a red light-emitting element or a green light-emitting element, and the second light-emitting element comprises a blue light-emitting element.

11 . The display panel according to claim 1 , wherein, the plurality of the light-emitting elements further comprise a third light-emitting element, the plurality of the pixel circuits further comprise a third pixel circuit, and the first light-emitting element, the second light-emitting element, and the third light-emitting element are in different light-emitting colors;

the third pixel circuit comprises a third target transistor, and the first target transistor, the second target transistor, and the third target transistor have a same function;

the width-to-length ratios of the first target transistor, the second target transistor, and the third target transistor are all different.

12 . The display panel according to claim 11 , wherein the first light-emitting element comprises a red light-emitting element, the second light-emitting element comprises a green light-emitting element, and the third light-emitting element comprises a blue light-emitting element;

the width-to-length ratio of the first target transistor is greater than that of the second target transistor, and the width-to-length ratio of the second target transistor is greater than that of the third target transistor.

13 . The display panel according to claim 11 , wherein the first light-emitting element comprises a red light-emitting element, the second light-emitting element comprises a green light-emitting element, and the third light-emitting element comprises a blue light-emitting element;

wherein the amplitude modulation subcircuit in the first pixel circuit comprises a first storage capacitor, the amplitude modulation subcircuit in the second pixel circuit comprises a second storage capacitor; the pulse width modulation subcircuit of the first pixel circuit comprises a third storage capacitor, and the pulse width modulation subcircuit in the second pixel circuit comprises a fourth storage capacitor;

wherein the amplitude modulation subcircuit in the third pixel circuit comprises a fifth storage capacitor, and the pulse width modulation subcircuit in the third pixel circuit comprises a sixth storage capacitor; and

wherein a capacitance value of the first storage capacitor is greater than that of the second storage capacitor, and a capacitance value of the second storage capacitor is greater than that of the fifth storage capacitor; and/or

a capacitance value of the third storage capacitor is greater than that of the fourth storage capacitor, and a capacitance value of the fourth storage capacitor is greater than that of the sixth storage capacitor.

14 . A display panel comprising:

a plurality of light-emitting elements, at least one of which comprises a first light-emitting element and a second light-emitting element with different emission colors; and

a plurality of pixel circuits, each of which comprises an amplitude modulation subcircuit and a pulse width modulation subcircuit, the pixel circuits comprising a first pixel circuit configured to drive the first light-emitting element and comprising a first target transistor, and a second pixel circuit configured to drive the second light-emitting element and comprising a second target transistor with a same function as that of the first target transistor and a different width-to-length ratio from that of the first target transistor;

wherein the first pixel circuit comprises the amplitude modulation subcircuit which comprises a first light-emitting control transistor, the second pixel circuit comprises the amplitude modulation subcircuit which comprises a second light-emitting control transistor, the first pixel circuit comprises the pulse width modulation subcircuit which comprises a third light-emitting control transistor, and the second pixel circuit comprises the pulse width modulation subcircuit which comprises a fourth light-emitting control transistor;

the first target transistor comprises the first light-emitting control transistor, and the second target transistor comprises the second light-emitting control transistor; or the first target transistor comprises the third light-emitting control transistor, and the second target transistor comprises the fourth light-emitting control transistor;

a width-to-length ratio of the first light-emitting control transistor is greater than that of the second light-emitting control transistor, and/or a width-to-length ratio of the third light-emitting control transistor is greater than that of the fourth light-emitting control transistor; and

the amplitude modulation subcircuit of the first pixel circuit further comprises a first driving transistor, the amplitude modulation subcircuit of the second pixel circuit further comprises a second driving transistor, the pulse width modulation subcircuit of the first pixel circuit further comprises a third driving transistor, and the pulse width modulation subcircuit of the second pixel circuit further comprises a fourth driving transistor;

the width-to-length ratio of the first light-emitting control transistor is greater than that of the first driving transistor; and/or

the width-to-length ratio of the second light-emitting control transistor is greater than that of the second driving transistor; and/or

the width-to-length ratio of the third light-emitting control transistor is greater than that of the third driving transistor; and/or

the width-to-length ratio of the fourth light-emitting control transistor is greater than that of the fourth driving transistor.

15 . The display panel according to claim 14 , wherein the first light-emitting control transistor comprises a first light-emitting control sub-transistor and a second light-emitting control sub-transistor, two ends of the first light-emitting control sub-transistor are respectively connected to the first light-emitting element and the second light-emitting control sub-transistor, and two ends of the second light-emitting control sub-transistor are respectively connected to the first light-emitting control sub-transistor and a first power supply terminal;

wherein a width-to-length ratio of the first light-emitting control sub-transistor is greater than that of the second light-emitting control sub-transistor; and/or

the second light-emitting control transistor comprises a third light-emitting control sub-transistor and a fourth light-emitting control sub-transistor, two ends of the third light-emitting control sub-transistor are respectively connected to the second light-emitting element and the fourth light-emitting control sub-transistor, and two ends of the fourth light-emitting control sub-transistor are respectively connected to the third light-emitting control sub-transistor and the first power supply terminal;

a width-to-length ratio of the third light-emitting control sub-transistor is greater than that of the fourth light-emitting control sub-transistor.

16 . The display panel according to claim 14 ,

wherein an absolute value of a difference between a width-to-length ratio of the first driving transistor and that of the second driving transistor is |ΔA1|, an absolute value of a difference between the width-to-length ratio of the first light-emitting control transistor and that of the second light-emitting control transistor is |ΔA2|, an absolute value of a difference between a width-to-length ratio of the third driving transistor and that of the fourth driving transistor is |ΔA3|, and |ΔA2|>|ΔA1|>|ΔA3|.

17 . A display apparatus comprising a display panel which comprises:

a plurality of light-emitting elements, at least one of which comprises a first light-emitting element and a second light-emitting element in different light-emitting colors; and

a plurality of pixel circuits, at least one of which comprises an amplitude modulation subcircuit and a pulse width modulation subcircuit, the pixel circuits comprising a first pixel circuit configured to drive the first light-emitting element and comprising a first target transistor, and a second pixel circuit configured to drive the second light-emitting element and comprising a second target transistor with a same function as that of the first target transistor and a different width-to-length ratio from that of the first target transistor;

wherein the first pixel circuit comprises the amplitude modulation subcircuit which comprises a first driving transistor, the second pixel circuit comprises the amplitude modulation subcircuit which comprises a second driving transistor, the first pixel circuit comprises the pulse width modulation subcircuit which comprises a third driving transistor, the second pixel circuit comprises the pulse width modulation subcircuit which comprises a fourth driving transistor;

the first target transistor comprises the first driving transistor, and the second target transistor comprises the second driving transistor; or the first target transistor comprises the third driving transistor, and the second target transistor comprises the fourth driving transistor;

a width-to-length ratio of the first driving transistor is greater than that of the second driving transistor, and/or a width-to-length ratio of the third driving transistor is greater than that of the fourth driving transistor; and

the width-to-length ratio of the first driving transistor is greater than that of the third driving transistor, and/or the width-to-length ratio of the second driving transistor is greater than that of the fourth driving transistor.